Datasheet Texas Instruments CD74AC112M — Ficha de datos

FabricanteTexas Instruments
SerieCD74AC112
Numero de parteCD74AC112M
Datasheet Texas Instruments CD74AC112M

Chanclas JK de doble filo de borde negativo con ajuste y reinicio 16-SOIC -55 a 125

Hojas de datos

CD54AC112, CD74AC112 datasheet
PDF, 857 Kb, Archivo publicado: enero 17, 2003
Extracto del documento

Notas de aplicación

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

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Clasificación del fabricante

  • Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop