Datasheet Texas Instruments DS25CP104ATSQ/NOPB — Ficha de datos

FabricanteTexas Instruments
SerieDS25CP104A
Numero de parteDS25CP104ATSQ/NOPB
Datasheet Texas Instruments DS25CP104ATSQ/NOPB

3.125 Gbps 4x4 LVDS Crosspoint Switch con pre-énfasis Tx y ecualización Rx 40-WQFN -40 a 85

Hojas de datos

DS25CP104A/CP114 3.125 Gbps 4x4 LVDS Xpoint Sw w/Xmit Pre-Emp & Receive Equal datasheet
PDF, 876 Kb, Revisión: C, Archivo publicado: marzo 4, 2013
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante

Embalaje

Pin40
Package TypeRTA
Industry STD TermWQFN
JEDEC CodeS-PQFP-N
Package QTY250
CarrierSMALL T&R
Device Marking2CP104AS
Width (mm)6
Length (mm)6
Thickness (mm).75
Pitch (mm).5
Max Height (mm).8
Mechanical DataDescargar

Paramétricos

ESD HBM8 kV
FunctionCrosspoint
Operating Temperature Range-40 to 85 C
Package GroupWQFN
Package Size: mm2:W x L40WQFN: 36 mm2: 6 x 6(WQFN) PKG

Plan ecológico

RoHSObediente

Notas de aplicación

  • Triple Rate SDI IP FPGA Resource Utilization on SDXILEVK/AES-EXP-SDI-G Ref Dsgn (Rev. A)
    PDF, 50 Kb, Revisión: A, Archivo publicado: abr 26, 2013
    Texas Instruments triple rate (SD/HD/3G) SDI demonstration board showcases the LMH0340 serializer,LMH0341 deserializer, LMH0344 equalizer, LMH1981 sync separator, LMH1982 clock generator withgenlock and the DS25CP104 cross-point switch. There are many advantages to using the TexasInstruments chipset that include superior performance, reduced cost using inexpensive FPGAs such asthe Xilinx S
  • LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
    PDF, 101 Kb, Revisión: A, Archivo publicado: abr 29, 2013
    This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
  • AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A)
    PDF, 275 Kb, Revisión: A, Archivo publicado: abr 26, 2013
    Jitter is a phenomenon troubling many designers of high-speed interfaces. It reduces available timingmargin, limits transmission distance between a transmitter and a receiver, and increases system cost bydemanding better performing and more expensive interconnects. LVDS interfaces are not spared fromthese ill effects as they now operate at bit rates exceeding the 3 Gbps mark. Texas Instrumen
  • A 3 Gbps SDI Connectivity Solution Supporting Uncompressed 1080p60 Video
    PDF, 2.9 Mb, Archivo publicado: marzo 18, 2008
  • DS25CP104 in 3G SDI Router Application
    PDF, 770 Kb, Archivo publicado: agosto 20, 2008

Linea modelo

Serie: DS25CP104A (2)

Clasificación del fabricante

  • Semiconductors > Interface > SDI > SDI Cable Equalizers, Drivers, Reclockers, and Cross-Points