Datasheet Texas Instruments DS25CP104A — Ficha de datos

FabricanteTexas Instruments
SerieDS25CP104A
Datasheet Texas Instruments DS25CP104A

3.125 Gbps 4x4 LVDS Crosspoint Switch con pre-énfasis de Tx y ecualización de Rx

Hojas de datos

DS25CP104A/CP114 3.125 Gbps 4x4 LVDS Xpoint Sw w/Xmit Pre-Emp & Receive Equal datasheet
PDF, 876 Kb, Revisión: C, Archivo publicado: marzo 4, 2013
Extracto del documento

Precios

Estado

DS25CP104ATSQ/NOPBDS25CP104ATSQX/NOPB
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante

Embalaje

DS25CP104ATSQ/NOPBDS25CP104ATSQX/NOPB
N12
Pin4040
Package TypeRTARTA
Industry STD TermWQFNWQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY2502500
CarrierSMALL T&RLARGE T&R
Device Marking2CP104AS2CP104AS
Width (mm)66
Length (mm)66
Thickness (mm).75.75
Pitch (mm).5.5
Max Height (mm).8.8
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsDS25CP104ATSQ/NOPB
DS25CP104ATSQ/NOPB
DS25CP104ATSQX/NOPB
DS25CP104ATSQX/NOPB
ESD HBM, kV88
FunctionCrosspointCrosspoint
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupWQFNWQFN
Package Size: mm2:W x L, PKG40WQFN: 36 mm2: 6 x 6(WQFN)40WQFN: 36 mm2: 6 x 6(WQFN)

Plan ecológico

DS25CP104ATSQ/NOPBDS25CP104ATSQX/NOPB
RoHSObedienteObediente

Notas de aplicación

  • Triple Rate SDI IP FPGA Resource Utilization on SDXILEVK/AES-EXP-SDI-G Ref Dsgn (Rev. A)
    PDF, 50 Kb, Revisión: A, Archivo publicado: abr 26, 2013
    Texas Instruments triple rate (SD/HD/3G) SDI demonstration board showcases the LMH0340 serializer,LMH0341 deserializer, LMH0344 equalizer, LMH1981 sync separator, LMH1982 clock generator withgenlock and the DS25CP104 cross-point switch. There are many advantages to using the TexasInstruments chipset that include superior performance, reduced cost using inexpensive FPGAs such asthe Xilinx S
  • LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
    PDF, 101 Kb, Revisión: A, Archivo publicado: abr 29, 2013
    This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
  • AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A)
    PDF, 275 Kb, Revisión: A, Archivo publicado: abr 26, 2013
    Jitter is a phenomenon troubling many designers of high-speed interfaces. It reduces available timingmargin, limits transmission distance between a transmitter and a receiver, and increases system cost bydemanding better performing and more expensive interconnects. LVDS interfaces are not spared fromthese ill effects as they now operate at bit rates exceeding the 3 Gbps mark. Texas Instrumen
  • A 3 Gbps SDI Connectivity Solution Supporting Uncompressed 1080p60 Video
    PDF, 2.9 Mb, Archivo publicado: marzo 18, 2008
  • DS25CP104 in 3G SDI Router Application
    PDF, 770 Kb, Archivo publicado: agosto 20, 2008

Linea modelo

Clasificación del fabricante

  • Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> Crosspoint-Switch