Datasheet ATmega164A - Summary (Microchip) - 8

4. Block Diagram Figure 4-1. Block Diagram SRAM
TCK TMS
JTAG
TDI
CPU
TDO OCD
Clock generation
PA[7:0] TOSC1
I/O
PB[7:0]
8MHz NVM I 32.768kHz
PC[7:0]
Calib RC N PORTS XOSC programming FLASH
PD[7:0]
/
TOSC2
128kHz int O osc
XTAL1
16MHz LP U Power T GPIOR[2:0] XOSC External management clock
XTAL2
and clock D EEPROM D
T0
A control A TC 0
OC0A
T T (8-bit)
OC0B
A A B B
VCC MISO
U EEPROMIF U Power SPI
MOSI SCK
S Watchdog S Supervision
SS RESET
Timer POR/BOD &
AIN0
RESET AC
AIN1 ACO GND
Internal
ADCMUX ADC[7:0]
Reference ADC
AREF RxD0 PCINT[31:0]
EXTINT USART 0
TxD0 INT[2:0] XCK0 OC1A/B
TC 1
RxD1 T1
USART 1
TxD1
(16-bit)
ICP1 XCK1 OC2A
TC 2 TWI
SDA OC2B
(8-bit async)
SCL Atmel ATmega164A [DATASHEET] 8 Atmel-42712C-ATmega164A_Datasheet_Summary-10/2016 Document Outline Introduction Feature Table of Contents 1. Description 2. Configuration Summary 3. Ordering Information 4. Block Diagram 5. Pin Configurations 5.1. Pinout 5.1.1. PDIP 5.1.2. TQFN and QFN 5.1.3. DRQFN 5.1.4. VFBGA 5.2. Pin Descriptions 5.2.1. VCC 5.2.2. GND 5.2.3. Port A (PA[7:0]) 5.2.4. Port B (PB[7:0]) 5.2.5. Port C (PC[7:0]) 5.2.6. Port D (PD[7:0]) 5.2.7. RESET 5.2.8. XTAL1 5.2.9. XTAL2 5.2.10. AVCC 5.2.11. AREF 6. I/O Multiplexing 7. General Information 7.1. Resources 7.2. Data Retention 7.3. About Code Examples 7.4. Capacitive Touch Sensing 7.4.1. QTouch Library 8. Packaging Information 8.1. 40-pin PDIP 8.2. 44-pin TQFP 8.3. 44-pin VQFN 8.4. 44-pin QFN 8.5. 49-pin VFBGA