Datasheet LTC6903, LTC6904 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | 1kHz - 68MHz Serial Port Programmable Oscillator |
| Páginas / Página | 14 / 6 — pin FuncTions GND (Pin 1):. CLK (Pin 5):. SDI (Pin 2):. CLK (Pin 6):. OE … |
| Formato / tamaño de archivo | PDF / 246 Kb |
| Idioma del documento | Inglés |
pin FuncTions GND (Pin 1):. CLK (Pin 5):. SDI (Pin 2):. CLK (Pin 6):. OE (Pin 7):. SCK (Pin 3):. V+ (Pin 8):. SEN (Pin 4):
Línea de modelo para esta hoja de datos
Versión de texto del documento
LTC6903/LTC6904
pin FuncTions GND (Pin 1):
Negative Power Supply (Ground). Should
CLK (Pin 5):
Auxiliary Clock Output. Frequency set by be tied directly to a ground plane for best performance. serial port.
SDI (Pin 2):
Serial Data Input. Data for serial transfer is
CLK (Pin 6):
Main Clock Output. Frequency set by serial port. presented on this pin.
OE (Pin 7):
Asynchronous Output Enable. CLK and CLK
SCK (Pin 3):
Serial Port Clock. Input, positive edge trig- are set LOW when this pin is LOW. gered. Clocks serial data in on rising edge.
V+ (Pin 8):
Positive Power Supply. This supply must be
SEN (Pin 4):
Serial Port Enable (LTC6903 Only). Input, kept free from noise and ripple. It should be bypassed active LOW. Initiates serial transaction when brought LOW, directly to a ground plane with a quality 0.1µF capacitor. finalizes transaction when brought HIGH after 16 clocks. Additional bypass may be necessary for operation at high
ADR (Pin 4):
Serial Port Address (LTC6904 Only). Sets frequency or under larger loads. the I2C serial port address.
block DiagraM
V+ OE CLK CLK 8 7 6 5 + + – MASTER PROGRAMMABLE A1 OSCILLATOR DIVIDER – I ISET f SET MO = 68MHz • kΩ V+ – V V SET SET DAC OCT SERIAL PORT 1 2 3 4 69034 BD GND SDI SCK SEN (LTC6903) ADR (LTC6904) 69034fe 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Power Requirements Serial Port Electrical Characteristics Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Theory of Operation Applications Information Package Description Revision History Typical Application Related Parts
pin FuncTions GND (Pin 1):
Negative Power Supply (Ground). Should
CLK (Pin 5):
Auxiliary Clock Output. Frequency set by be tied directly to a ground plane for best performance. serial port.
SDI (Pin 2):
Serial Data Input. Data for serial transfer is
CLK (Pin 6):
Main Clock Output. Frequency set by serial port. presented on this pin.
OE (Pin 7):
Asynchronous Output Enable. CLK and CLK
SCK (Pin 3):
Serial Port Clock. Input, positive edge trig- are set LOW when this pin is LOW. gered. Clocks serial data in on rising edge.
V+ (Pin 8):
Positive Power Supply. This supply must be
SEN (Pin 4):
Serial Port Enable (LTC6903 Only). Input, kept free from noise and ripple. It should be bypassed active LOW. Initiates serial transaction when brought LOW, directly to a ground plane with a quality 0.1µF capacitor. finalizes transaction when brought HIGH after 16 clocks. Additional bypass may be necessary for operation at high
ADR (Pin 4):
Serial Port Address (LTC6904 Only). Sets frequency or under larger loads. the I2C serial port address.
block DiagraM
V+ OE CLK CLK 8 7 6 5 + + – MASTER PROGRAMMABLE A1 OSCILLATOR DIVIDER – I ISET f SET MO = 68MHz • kΩ V+ – V V SET SET DAC OCT SERIAL PORT 1 2 3 4 69034 BD GND SDI SCK SEN (LTC6903) ADR (LTC6904) 69034fe 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Power Requirements Serial Port Electrical Characteristics Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Theory of Operation Applications Information Package Description Revision History Typical Application Related Parts