Datasheet AD9213 (Analog Devices) - 20

FabricanteAnalog Devices
Descripción12-Bit, 10.25 GSPS, JESD204B, RF Analog-to-Digital Converter
Páginas / Página97 / 20 — AD9213. Preliminary Technical Data. TMU. Table 9 AD9213 TMU Register …
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AD9213. Preliminary Technical Data. TMU. Table 9 AD9213 TMU Register Summary Address. Register Name. Bits Description. Reset Access

AD9213 Preliminary Technical Data TMU Table 9 AD9213 TMU Register Summary Address Register Name Bits Description Reset Access

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AD9213 Preliminary Technical Data TMU
The AD9213 contains a TMU that functions as a digital To obtain the maximum temperature, read Register 0x1609 thermometer. The TMU is comprised of 5 sensors placed at (maximum temperature word containing the 8 LSBs) and different chip locations. The on-die temperature value is Register 0x160A (maximum temperature word containing the measured and digitized through an ADC. 8 MSBs). At any given time, the value from the sensor having the highest For example: temperature is stored in Register 0x1609, Bits[7:0] and 1. Register 0x1609 = 0x76 = 01110110b Register 0x160A, Bits[7:0]. These values combine to give a 2. Register 0x160A = 0x2C = 00101100b 16-bit maximum temperature word. Similarly, the value from 3. Concatenate the MSBs to the LSBs to give a 16-bit word: the sensor with the lowest temperature is stored in 0x2C76 = 0010110001110110b. Register 0x160D, Bits[7:0] and Register 0x160E, Bits[7:0]. These 4. The 9 MSBs of this word represent the twos complement values combine to give a 16-bit minimum temperature word. integer value of the temperature in degrees Celsius: The 9 MSBs of each 16-bit temperature word are the integer 001011000 (twos complement) = 88 (decimal). portion of the die temperature in twos complement. The seven 5. The 7 LSBs of the 16-bit word are the fractional portion LSBs represent the fractional portion of the temperature, that is, where the most significant (left most) bit value is 2−1, the the digits to the right of the decimal place. The most significant next is 2−2, and so on. of the 7 LSBs represents 2−1, the next bit to the right is 2−2, and Using this convention, 1110110 = 0.92188 (decimal). so on. Therefore, the die temperature reported by the highest reading The following is an example of obtaining the value of the sensor sensor is 88°C + 0.92188°C = 88.92188°C. The accuracy of the that produces the highest temperature reading. The procedure TMU is typically ±2°C, and the fractional portion of the to reading the minimum temperature is the same as the temperature value has limited significance. procedure to read the maximum temperature, with the exception of different register addresses depending on which temperature level is read.
Table 9 AD9213 TMU Register Summary Address Register Name Bits Description Reset Access
0x0001609 MAX_TEMPERATURE_LSB [7:0] Bits[7:0] of maximum temperature of all temperature sensors. Q9.7 format. 0x0 R 0x000160A MAX_TEMPERATURE_MSB [7:0] Bits[15:8] of maximum temperature of all temperature sensors. Q9.7 format. 0x0 R 0x000160D MIN_TEMPERATURE_LSB [7:0] Bits[7:0] of minimum temperature of all temperature sensors. Q9.7 format. 0x0 R 0x000160E MIN_TEMPERATURE_MSB [7:0] Bits[15:8] of minimum temperature of all temperature sensors. Q9.7 format. 0x0 R Rev. PrG | Page 20 of 97 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS AD9213-6G AD9213-10G EQUIVALENT CIRCUITS THEORY OF OPERATION ADC ARCHITECTURE ANALOG INPUT CONSIDERATIONS Differential Input Configurations Input Common Mode Input Overvoltage Clamp VOLTAGE REFERENCE CLOCK INPUT CONSIDERATIONS Clock Synthesis Clock Jitter Considerations Power-Down/Standby Mode Temperature Diode and Sensor TMU ADC FAST DETECT FAST THRESHOLD DETECTION (FD) DIGITAL DOWNCONVERTER DDC GENERAL DESCRIPTION Frequency Translation Stage (Optional) Filtering Stage Gain Stage (Optional) Complex to Real Conversion Stage (Optional) DDC FREQUENCY TRANSLATION Variable IF Mode ZIF Mode fS/4 Hz IF Mode Test Mode DDC NCO Description DDC NCO Programmable Modulus Mode DDC NCO Coherent Mode NCO FTW/POW/MAW/MAB Description NCO FTW/POW/MAW/MAB Programmable Modulus Mode Example Calculation NCO FTW/POW/MAW/MAB Coherent Mode Example Calculation NCO Channel Selection GPIO Level Control Mode GPIO Edge Control Mode Profile Select Timer Mode Register Map Mode Setting Up the Multichannel NCO Feature NCO Synchronization NCO Multichip Synchronization NCO Multichip Synchronization at Startup NCO Multichip Synchronization during Normal Operation DDC Mixer Description DDC NCO + Mixer Loss and SFDR DDC DECIMATION FILTERS M2_HB7 Filter Description M2_HB6 Filter Description M2_HB5 Filter Description M2_HB4 Filter Description M2_HB3 Filter Description M2_HB2 Filter Description M2_HB1 Filter Description M1_TB2 Filter Description DDC GAIN STAGE DDC COMPLEX TO REAL CONVERSION DDC EXAMPLE CONFIGURATIONS DIGITAL OUTPUTS INTRODUCTION TO THE JESD204B INTERFACE JESD204B OVERVIEW FUNCTIONAL OVERVIEW Transport Layer Data Link Layer Physical Layer JESD204B LINK ESTABLISHMENT Code Group Synchronization (CGS) and SYNCINB± Initial Lane Alignment Sequence (ILAS) User Data and Error Detection 8-Bit/10-Bit Encoder PHYSICAL LAYER (DRIVER) OUTPUTS Digital Outputs, Timing, and Controls De-Emphasis Phase-Locked Loop SETTING UP THE AD9213 DIGITAL INTERFACE JESD204B Transport Layer Settings Serial Line Rates K Settings DETERMINISTIC LATENCY SUBCLASS 0 OPERATION SUBCLASS 1 OPERATION Deterministic Latency Requirements Setting Deterministic Latency Registers MULTICHIP SYNCHRONIZATION SAMPLED SYSREF MODE AVERAGED SYSREF MODE TEST MODES JESD204B TEST MODES SERIAL PORT INTERFACE MEMORY MAP READING THE MEMORY MAP REGISTER TABLES Open and Reserved Locations Default Values Logic Levels SPI Soft Reset REGISTER DETAILS: SYSTEM CONTROL SIGNALS (SPI_ONLY_REGMAP) REGISTER DETAILS: (USER_CTRL) REGISTER DETAILS: (AD9213_CUST_SPI_REGMAP) REGISTER DETAILS: (MAIN_REGMAP) REGISTER DETAILS: JTX_QBF REGISTER REGISTER DETAILS: DIG_DP_REGMAP REGISTER DETAILS: (AD9213_CUST_REG) REGISTER DETAILS: LCPLL_28NM REGISTER REGISTER DETAILS: JESD204B REGISTER MAP FOR FOUR CHANNELS (JTX_28NM_16CH) APPLICATIONS INFORMATION POWER SUPPLY RECOMMENDATIONS OUTLINE DIMENSIONS