Datasheet InnoSwitch3-MX (Power Integrations) - 4

FabricantePower Integrations
DescripciónOff-Line Multiple Output QR Flyback Switcher IC with Integrated 650 V or 725 V Switch, Synchronous Rectification and FluxLink Feedback
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InnoSwitch3-MX. InnoSwitch3-MX Functional Description. Primary Bypass Output Overvoltage Function

InnoSwitch3-MX InnoSwitch3-MX Functional Description Primary Bypass Output Overvoltage Function

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InnoSwitch3-MX InnoSwitch3-MX Functional Description Primary Bypass Output Overvoltage Function
The PRIMARY BYPASS pin has an OV protection feature with either a The InnoSwitch3-MX combines a high-voltage power switch, along latching or an auto-reset response. A Zener diode in paral el with the with both primary-side and secondary-side control ers in one device. resistor in series with the PRIMARY BYPASS pin capacitor is typical y The InnoSwitch3-MX is intended to be paired with an InnoMux used to detect an overvoltage on the primary bias winding and controller. activate the protection mechanism. In the event that the current into The InnoSwitch3-MX architecture incorporates a novel inductive the PRIMARY BYPASS pin exceeds I , the device will latch-off or SD coupling feedback scheme using the package leadframe and bond disable the power switch for a time t , after which time the AR(OFF) wires to provide a safe, reliable, and low-cost means to accurately control er will restart and attempt to return to regulation. communicate power requests from the InnoMux control er to the Output OV protection is also included as an integrated feature on the primary control er. InnoMux control er. The primary control er on InnoSwitch3-MX is a quasi-resonant (QR)
Over-Temperature Protection
flyback control er that has the ability to operate in continuous conduction mode (CCM). The control er uses a variable current The thermal shutdown circuitry senses the primary switch die control scheme. The primary consists of a jitter oscillator; a receiver temperature. The threshold is set to T with either a hysteretic or SD circuit magnetical y coupled to the secondary control er, a current latch-off response. limit control er, 5 V regulator on the PRIMARY BYPASS pin, audible Hysteretic response: If the die temperature rises above the threshold, noise reduction engine, bypass overvoltage detection circuit, a the power switch is disabled and remains disabled until the die lossless input line sensing circuit, current limit selection circuitry, temperature fal s by T at which point switching is re-enabled. A overvoltage protection, leading edge blanking, secondary output SD(H) large amount of hysteresis is provided to prevent over-heating of the diode / SR MOSFET short protection circuit and a 650 V / 725 V / PCB due to a continuous fault condition. 750 V power switch. Latch-off response: If the die temperature rises above the threshold The secondary control er consists of a transmitter circuit that is the power switch is disabled. The latching condition is reset by magnetical y coupled to the primary receiver, synchronous rectifier bringing the PRIMARY BYPASS pin below V or by going below (SR) MOSFET driver, timing functions and a host of integrated BPP(RESET) the UNDER/OVER INPUT VOLTAGE pin UV (I ) threshold. protection features. UV- Over-temperature protection is also included as an integrated feature Figures 3 and 4 show the functional block diagrams of the primary on the InnoMux control er. and secondary control ers with the most important features.
Current Limit Operation Primary Controller
The primary-side control er has a current limit threshold ramp that is InnoSwitch3-MX has variable frequency QR control er plus CCM/CrM/ inversely proportional to the time from the end of the previous DCM operation for enhanced efficiency and extended output power primary switching cycle (i.e. from the time the primary switch turns capability. off at the end of a switching cycle).
PRIMARY BYPASS Pin Regulator
This characteristic produces a primary current limit that increases as The PRIMARY BYPASS pin has an internal regulator that charges the the switching frequency (load) increases (Figure 6). PRIMARY BYPASS pin capacitor to V by drawing current from the BPP DRAIN pin whenever the power switch is off. The PRIMARY BYPASS This algorithm enables the most efficient use of the primary switch pin is the internal supply voltage node. When the power switch is on, with the benefit that this algorithm responds to digital feedback the device operates from the energy stored in the PRIMARY BYPASS information immediately when a feedback switching cycle request is pin capacitor. received. In addition, a shunt regulator clamps the PRIMARY BYPASS pin At high load, switching cycles have a maximum current approaching voltage to V when current is provided to the PRIMARY BYPASS 100% I . This gradual y reduces to 30% of the full current limit as SHUNT LIM pin through an external resistor. This al ows the InnoSwitch3-MX to load decreases. Once 30% current limit is reached, there is no be powered external y through a bias winding, decreasing the further reduction in current limit (since this is low enough to avoid no-load consumption and allowing meeting typical TV/Display audible noise). The time between switching cycles will continue to application stand-by power requirements of 275 mW input power with increase as load reduces. 100 mW output load.
Jitter Primary Bypass ILIM Programming
The normalized current limit is modulated between 100% and 95% at InnoSwitch3-MX ICs al ow the user to adjust primary current limit a modulation frequency of f ; this results in a frequency jitter of M (I ) settings through the selection of the PRIMARY BYPASS pin ~7 kHz with average frequency of ~100 kHz. LIM capacitor value. A ceramic capacitor can be used. There are 2
Auto-Restart
selectable capacitor sizes − 0.47 µF and 4.7 µF for setting standard In the event a fault condition occurs (such as an output overload, and increased ILIM settings respectively. More information on which output short-circuit, or external component/pin fault), the InnoSwitch3-MX support the adjustable current limit can be found in InnoSwitch3-MX enters auto-restart (AR) or latches off. This is the parameters table. typical y initiated by the InnoMux control er.
Primary Bypass Undervoltage Threshold
The PRIMARY BYPASS pin undervoltage circuitry disables the power The latching condition is reset by bringing the PRIMARY BYPASS pin switch when the PRIMARY BYPASS pin voltage drops below ~4.5 V below ~3 V or by going below the UNDER/OVER INPUT VOLTAGE pin (=V - V ) in steady-state operation. Once the PRIMARY BYPASS UV (I ) threshold. UV- BPP BPP(H) pin voltage fal s below this threshold, it must rise to V to BPP(SHUNT) re-enable turn-on of the power switch.
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Rev. B 03/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-MX Functional Description Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics InSOP-24D Package Drawing Part Ordering Information