Datasheet PI6CB33601 (Diodes)
| Fabricante | Diodes |
| Descripción | Very Low Power 6-Output PCIe Clock Buffer With On-Chip Termination |
| Páginas / Página | 20 / 1 — Lead-free Green. PI6CB33601. Very Low Power 6-Output PCIe Clock Buffer … |
| Formato / tamaño de archivo | PDF / 1.3 Mb |
| Idioma del documento | Inglés |
Lead-free Green. PI6CB33601. Very Low Power 6-Output PCIe Clock Buffer With On-Chip Termination. Features. Description
Línea de modelo para esta hoja de datos
Versión de texto del documento
A product Line of
b P
Diodes Incorporated
Lead-free Green PI6CB33601 Very Low Power 6-Output PCIe Clock Buffer With On-Chip Termination Features Description
Î Î 3.3V supply voltage The PI6CB33601 is a 6-output very low power PCIe Gen1/Gen2/ Î Î HCSL input: 100MHz, also support 50MHz, 125MHz or Gen3/Gen4/Gen5 clock buffer. It takes a reference input to fanout 133.33MHz via SMBus six 100MHz low power differential HCSL outputs with on-chip Î Î 6 differential low power HCSL outputs with on-chip terminations. The on-chip termination can save 24 external re- termination sistors and make layout easier. Individual OE pin for each output Î Î Default ZOUT = 100Ω provides easier power management. Î Î Spread spectrum tolerant It uses Diodes proprietary PLL design to achieve very low jitter Î Î Individual output enable that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements. Î Î Programmable Slew rate and output amplitude for each output Other than PCIe 100MHz support, this device also support Eth- Î Î Differential outputs blocked until PLL is locked ernet application with 50MHz, 125MHz and 133.33MHz via SMBus. It provides various options such as different slew rate and Î Î Strapping pins or SMBus for configuration amplitude through SMBUS so that users can configure the de- Î Î Differential output-to-output skew <50ps vice easily to get the optimized performance for their individual Î Î Very low jitter outputs boards. Î Differential cycle-to-cycle jitter <50ps Î PCIe Gen1/Gen2/Gen3/Gen4/Gen5 CC compliant
Block Diagram
Î PCIe Gen 2 and 3 SRiS and SRnS compliant OE[5:0]# Î Î Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Q5 Î Î Halogen and Antimony Free. “Green” Device (Note 3) Q4 Î Î For automotive applications requiring specific change control IN+ PLL (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, IN- Q3 and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. Q2 https://www.diodes.com/quality/product-definitions/ SCLK Q1 Î Î Packaging (Pb-free & Green): SDATA SADR_TRI CTRL Q0 Î 40-lead 5×5mm TQFN BW_SEL_TRI LOGIC PD#
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CB33601 www.diodes.com January 2020 Document Number DS41290 Rev 5-2 1 Diodes Incorporated
b P
Diodes Incorporated
Lead-free Green PI6CB33601 Very Low Power 6-Output PCIe Clock Buffer With On-Chip Termination Features Description
Î Î 3.3V supply voltage The PI6CB33601 is a 6-output very low power PCIe Gen1/Gen2/ Î Î HCSL input: 100MHz, also support 50MHz, 125MHz or Gen3/Gen4/Gen5 clock buffer. It takes a reference input to fanout 133.33MHz via SMBus six 100MHz low power differential HCSL outputs with on-chip Î Î 6 differential low power HCSL outputs with on-chip terminations. The on-chip termination can save 24 external re- termination sistors and make layout easier. Individual OE pin for each output Î Î Default ZOUT = 100Ω provides easier power management. Î Î Spread spectrum tolerant It uses Diodes proprietary PLL design to achieve very low jitter Î Î Individual output enable that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements. Î Î Programmable Slew rate and output amplitude for each output Other than PCIe 100MHz support, this device also support Eth- Î Î Differential outputs blocked until PLL is locked ernet application with 50MHz, 125MHz and 133.33MHz via SMBus. It provides various options such as different slew rate and Î Î Strapping pins or SMBus for configuration amplitude through SMBUS so that users can configure the de- Î Î Differential output-to-output skew <50ps vice easily to get the optimized performance for their individual Î Î Very low jitter outputs boards. Î Differential cycle-to-cycle jitter <50ps Î PCIe Gen1/Gen2/Gen3/Gen4/Gen5 CC compliant
Block Diagram
Î PCIe Gen 2 and 3 SRiS and SRnS compliant OE[5:0]# Î Î Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Q5 Î Î Halogen and Antimony Free. “Green” Device (Note 3) Q4 Î Î For automotive applications requiring specific change control IN+ PLL (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, IN- Q3 and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. Q2 https://www.diodes.com/quality/product-definitions/ SCLK Q1 Î Î Packaging (Pb-free & Green): SDATA SADR_TRI CTRL Q0 Î 40-lead 5×5mm TQFN BW_SEL_TRI LOGIC PD#
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CB33601 www.diodes.com January 2020 Document Number DS41290 Rev 5-2 1 Diodes Incorporated