Datasheet AD74412R (Analog Devices) - 38

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AD74412R Data Sheet DIGITAL INPUT, LOOP POWERED MODE
Figure 46 shows the current, voltage, and output paths of the Like the current output mode function (see the Current Output digital input, loop powered mode configuration. Mode section), the digital input, loop powered function
Interpreting ADC Data
configures the output state to provide a high-side current output The ADC is not required for digital input operation. However, that can power an external sensor. Program the DAC_CODEx the ADC is available for voltage and current measurements registers to provide the required current source limit. when the digital input loop powered mode is enabled. In digital Either the unfiltered voltage on the SENSEL_x pin or the filtered input loop powered mode, the ADC, by default, measures the input on the SENSELF_x pin can be routed to the on-chip voltage across the I/OP_x to I/ON_x screw terminals in a 0 V comparators. These comparators compare the voltage on the to 10 V range. Use the ADC measurement result to calculate selected pin to a programmable threshold that can either be a this voltage by using the following equation: fixed voltage or a voltage proportional to the VAVDD. See the VADC = (ADC_CODE/65,535) × Voltage Range Digital Input Threshold Setting section for more information on the programmable threshold voltages. where: VADC is the measured voltage in volts. The output of the comparators can be debounced (see the ADC_CODE is the value of the ADC_RESULTx registers. Debounce Function section) or passed directly or inverted Voltage Range is 10 V, the measurement range of the ADC. to the serial interface and/or to the parallel output pins. If the default measurement configuration is changed to measure The digital input comparator outputs are monitored by reading the current, tie the VIOUTN_x pin to ground via the on-chip from the DIN_COMP_OUT register. The comparator outputs can 200 kΩ resistor by enabling the CH_200K_TO_GND bit in the also be monitored with the GPO_x pins. Each channel has a ADC_CONFIGx registers. corresponding GPO_x pin that is configured via the GPO_ CONFIGx registers to drive out the debounced comparator output signal.
REFOUT REFIN ALDO1V8 ALDO5V AVDD OUTPUT PATH VOLTAGE PATH CURRENT PATH AD74412R 1.8V 5V ALDO LDO IOVDD CCOMP_x DVCC VIOUTP_x 1nF CASCODE_x OPTIONAL P CHANNEL FET 2.5V FOR HIGH RLOAD I DLDO1V8 OUT 1.8V INTERNAL DLDO VREF OSCILLATOR R DAC SENSE G=1 100, 0.1% DGND 10ppm/°C I/OP_x BAV99 SCLK SENSEHF_x SYNC L SENSELF_x UX INPUT VIOUTN_x SDI ADC UX M SHIFT AGND_SENSE M REGISTER SDO SENSEH_x 2kΩ 0.1% AND CHANNE ALERT DIGITAL SENSEHF_x LOGIC ADC_RDY R OUT A C FILTER FILTER CAP LDAC DIAGNOSTICS 68nF SENSELF_x BLOCK SENSEL_x 2kΩ GPO_A DEGLITCH AND GPO UX GPO_B M SENSEL_x SENSELF_x CONFIGU- RATION TVS R GPO_C C FILTER CIRCUITRY FILTER GPO_D THRESHOLD CHANNEL A POWER-ON CHANNEL B RESET RESET I/ON_x CHANNEL C AVSS = NEGATIVE DVCC CHARGE PUMP AGND CHANNEL D AGND1 AVSS CPUMP_N CPUMP_P AGND3 AGND2 AGND_SENSE
017
CPUMP FLY
21274-
CAPACITOR
Figure 46. Digital Input, Loop Powered Configuration Mode Rev. A | Page 38 of 66 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION COMPANION PRODUCTS PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS VOLTAGE OUTPUT CURRENT OUTPUT VOLTAGE INPUT CURRENT INPUT EXTERNALLY POWERED CURRENT INPUT LOOP POWERED RTD MEASUREMENT DIGITAL INPUT LOGIC DIGITAL INPUT LOOP POWERED ADC SPECIFICATIONS GENERAL SPECIFICATIONS TIMING CHARACTERISTICS SPI Timing Specifications Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS VOLTAGE OUTPUT CURRENT OUTPUT REFERENCE ADC SUPPLIES THEORY OF OPERATION ROBUST ARCHITECTURE SERIAL INTERFACE DAC ARCHITECTURE ADC OVERVIEW REFERENCE Reference Noise Charge Pump POWER-ON STATE OF THE AD74412R DEVICE FUNCTIONS High Impedance Interpreting ADC Data Voltage Output Mode Voltage Output Short-Circuit Protection Interpretin ADC Data Current Output Mode Current Output Open Circuit Detection Interpreting ADC Data Voltage Input Mode Selectable 200 kΩ to GND Interpreting ADC Data Current Input, Externally Powered Mode Short-Circuit Protection Interpreting ADC Data Current Input, Loop Powered Mode Short-Circuit Protection Interpreting ADC Data Resistance Measurement (External 2-Wire RTD) Interpreting ADC Data Digital Input Logic Interpreting ADC Data Digital Input Current Sink Digital Input Threshold Setting Debounce Function Debounce Mode 0 (Default) Debounce Mode 1 Digital Input Inverter DIGITAL INPUT, LOOP POWERED MODE Interpreting ADC Data GETTING STARTED USING CHANNEL FUNCTIONS Switching Channel Functions ADC FUNCTIONALITY ADC Conversion Rates ADC_RDYB Functionality ADC Output Data Format ADC Noise DIAGNOSTICS DACs LDAC Function Clear Code Function Digital Linear Slew Rate Control DRIVING INDUCTIVE LOADS RESET FUNCTION THERMAL ALERT AND THERMAL RESET FAULTS AND ALERTS Channel Faults POWER SUPPLY MONITORS GPO_x PINS SPI INTERFACE AND DIAGNOSTICS SPI CRC SPI Interface SCLK Count Feature Readback Mode Streaming Mode Auto Readback BOARD DESIGN AND LAYOUT CONSIDERATIONS APPLICATIONS INFORMATION REGISTER MAP NOP REGISTER FUNCTION SETUP REGISTER PER CHANNEL ADC CONFIGURATION REGISTER PER CHANNEL DIGITAL INPUT CONFIGURATION REGISTER PER CHANNEL GPO PARALLEL DATA REGISTER GPO CONFIGURATION REGISTER PER CHANNEL OUTPUT CONFIGURATION REGISTER PER CHANNEL DAC CODE REGISTER PER CHANNEL DAC CLEAR CODE REGISTER PER CHANNEL DAC ACTIVE CODE REGISTER PER CHANNEL DIGITAL INPUT THRESHOLD REGISTER ADC CONVERSION CONTROL REGISTER DIAGNOSTICS SELECT REGISTER DIGITAL OUTPUT LEVEL REGISTER ADC CONVERSION RESULTS REGISTER PER CHANNEL DIAGNOSTIC RESULTS REGISTERS PER DIAGNOSTIC CHANNEL ALERT STATUS REGISTER LIVE STATUS REGISTER ALERT MASK REGISTER READBACK SELECT REGISTER 80 SPS ADC CONVERSION CONTROL REGISTER THERMAL RESET ENABLE REGISTER COMMAND REGISTER SCRATCH OR SPARE REGISTER SILICON REVISION REGISTER OUTLINE DIMENSIONS ORDERING GUIDE