Datasheet XDPL8219 (Infineon) - 5

FabricanteInfineon
DescripciónDigital Flyback Controller IC
Páginas / Página45 / 5 — XDPL8219 Digital Flyback Controller IC. XDP™ Digital Power. 1 Pin …
Revisión01_01
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XDPL8219 Digital Flyback Controller IC. XDP™ Digital Power. 1 Pin configuration. Pin configuration. Figure 2. Pinning of XDPL8219

XDPL8219 Digital Flyback Controller IC XDP™ Digital Power 1 Pin configuration Pin configuration Figure 2 Pinning of XDPL8219

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XDPL8219 Digital Flyback Controller IC XDP™ Digital Power 1 Pin configuration 1 Pin configuration
Pin assignments and basic pin description information are shown below. ZCD 1 8 GND FB 2 7 VCC CS 3 6 UART GD 4 5 HV PG-DSO-8 (150mil)
Figure 2 Pinning of XDPL8219 Table 1 Pin definitions and functions Name Pin Type Function
ZCD 1 I Zero-crossing detection: The ZCD pin is connected to the transformer auxiliary winding via external resistors divider. It is used for zero-crossing detection, primary-side output voltage sensing and input voltage sensing. FB 2 I Secondary Side Feedback: The FB pin is used as a feedback pin for
SSR
. CS 3 I Current sensing: The CS pin is used for Flyback MOSFET current sensing via external shunt resistor. GD 4 O Gate driver: The GD pin is used for Flyback MOSFET gate drive control via external series resistor. HV 5 I High voltage: The HV pin is connected to the rectified input voltage via external series resistor. The HV pin is used to charge VCC pin voltage during startup and protection, via an internal 600 V startup cell. In addition, it is also used for line synchronization. UART 6 I/O
UART
configuration: The UART pin is used as the digital interface for IC parameter configuration. It can also be used for the information reporting based on the uni-directional UART communication (when UART reporting is enabled). VCC 7 I Operating voltage supply and sensing GND 8 -
IC
grounding Data Sheet 5 Revision 1.1 2020-08-26 Document Outline Features Product validation Potential applications Description Table of contents 1 Pin configuration 2 Functional block diagram 3 Functional description 3.1 Startup 3.2 Regulated mode 3.3 Operation cycle 3.4 Line synchronization 3.5 Enhanced power quality 3.6 Switching frequency dithering for constant DC input voltage 3.7 Configurable gate voltage rising slope at GD pin 3.8 UART reporting 3.9 Input voltage and output voltage estimation 3.9.1 Output voltage estimation 3.9.2 Input voltage estimation 3.10 Protection features 3.10.1 Primary MOSFET overcurrent protection 3.10.2 Output undervoltage protection 3.10.3 Output overvoltage protection 3.10.4 Transformer demagnetization time shortage protection 3.10.5 Minimum input voltage startup check and input undervoltage protection 3.10.6 Maximum input voltage startup check and input overvoltage protection 3.10.7 VCC undervoltage lockout 3.10.8 VCC undervoltage protection 3.10.9 VCC overvoltage protection 3.10.10 IC overtemperature protection 3.10.11 Other protections 3.10.12 Protection reactions 3.11 Debug mode 4 List of Parameters 5 Electrical Characteristics and Parameters 5.1 Package Characteristics 5.2 Absolute Maximum Ratings 5.3 Operating Conditions 5.4 DC Electrical characteristics 6 Package Dimensions 7 References 8 Revision History Glossary ABM ADC BOM CCM CRC CV DCM EMI FB GUI HID IC IIR OCP1 OTP PCB PC PFC PF PWM QRM1 QRMn RAM SSR THD UART USB UVLO Disclaimer