Datasheet AD524 (Analog Devices)

FabricanteAnalog Devices
DescripciónPrecision Instrumentation Amplifier
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RevisiónG
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Precision Instrumentation Amplifier. Data Sheet. AD524. FEATURES. FUNCTIONAL BLOCK DIAGRAM

Datasheet AD524 Analog Devices, Revisión: G

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Precision Instrumentation Amplifier Data Sheet AD524 FEATURES FUNCTIONAL BLOCK DIAGRAM Low noise: 0.3 μV p-p at 0.1 Hz to 10 Hz Low nonlinearity: 0.003% (G = 1) – INPUT 1 PROTECTION High CMRR: 120 dB (G = 1000) 4.44kΩ AD524 G = 10 13 Low offset voltage: 50 μV 404Ω G = 100 12 Low offset voltage drift: 0.5 μV/°C Vb 40Ω 20kΩ SENSE Gain bandwidth product: 25 MHz G = 1000 11 20kΩ 20kΩ Pin programmable gains of 1, 10, 100, 1000 RG1 16 OUTPUT Input protection, power-on/power-off RG2 3 20kΩ 20kΩ No external components required 20kΩ REFERENCE Internally compensated + INPUT 2 PROTECTION
01 0
MIL-STD-883B and chips available
00- 005
16-lead ceramic DIP and SOIC packages and 20-terminal
Figure 1.
leadless chip carrier available Available in tape and reel in accordance with EIA-481A standard Standard military drawing also available GENERAL DESCRIPTION
The AD524 is a precision monolithic instrumentation amplifier
PRODUCT HIGHLIGHTS
designed for data acquisition applications requiring high accu- 1. Guaranteed low offset voltage, low offset voltage drift, and racy under worst-case operating conditions. An outstanding low noise for precision high gain applications. combination of high linearity, high common-mode rejection, 2. Functionally complete with pin programmable gains of 1, low offset voltage drift, and low noise makes the AD524 suitable 10, 100, and 1000, and single resistor-programmable for for use in many data acquisition systems. The AD524 has an any gain. output offset voltage drift of less than 25 μV/°C, input offset 3. Input and output offset nulling terminals are provided for voltage drift of less than 0.5 μV/°C, CMR above 90 dB at unity high precision applications and to minimize offset voltage gain (120 dB at G = 1000), and maximum nonlinearity of changes in gain ranging applications. 0.003% at G = 1. The gain bandwidth product of the AD524 is 4. Input protected for both power-on and power-off fault 25 kHz (G = 1000). The output slew rate of 5 V/μs and settling conditions. time of 15 μs to 0.01% for gains of 1 to 100, makes it suitable for 5. Superior dynamic performance with a gain bandwidth high speed data acquisition systems. product of 25 MHz, full power response of 75 kHz and a As a complete amplifier, the AD524 does not require any external settling time of 15 μs to 0.01% of a 20 V step (G = 100). components for fixed gains of 1, 10, 100, and 1000. For other gain settings between 1 and 1000, only a single resistor is required. The AD524 input is fully protected for both power-on and power-off fault conditions. The AD524 is available in four versions of accuracy and operating temperature range. The economical A grade, the low drift B grade, and lower drift, higher linearity C grade are specified from −25°C to +85°C. The S grade guarantees performance to specification over the extended temperature range −55°C to +125°C. The AD524 is available in a 16-lead ceramic DIP, 16-lead SBDIP, 16-lead SOIC wide packages, and 20-terminal leadless chip carrier.
Rev. G Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©1983–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION INPUT PROTECTION INPUT OFFSET AND OUTPUT OFFSET GAIN INPUT BIAS CURRENTS COMMON-MODE REJECTION GROUNDING SENSE TERMINAL REFERENCE TERMINAL PROGRAMMABLE GAIN AUTO-ZERO CIRCUITS ERROR BUDGET ANALYSIS REFERENCES OUTLINE DIMENSIONS ORDERING GUIDE