Datasheet LTC4332 (Analog Devices) - 12

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APPLICATIONS INFORMATION Overview
driven low, slave select pins SS1, SS2, SS3 are available Two LTC4332 devices are required for a complete extended to access remote SPI slave devices. The device captures SPI network. On the local side, set the REMOTE pin low SPI data on the MOSI pin and sends it across the first dif- to set the SPI interface into slave device mode. A second ferential link as an encoded bit-stream to the remote side LTC4332 with its REMOTE pin set high sets the SPI inter- LTC4332. Concurrently, the local side LTC4332 receives face into master device mode. Three slave select pins are read-back data from the remote side through the second available to connect to slave devices on the remote side differential pair and stores it in an internal word FIFO. along with a shared interrupt signal. Read data is held in the internal word FIFO until the next word boundary is detected then is driven onto pin MISO. The LTC4332 SPI extender solution supports remote slave Therefore, MISO data is always delayed by one word. See devices with mixed SCK polarity and phase requirements. Figure 12. An extra word appended to the existing trans- The remote side LTC4332 switches to the device’s specific action can be used to read out the last word. The word SPI interface mode before initiating a transfer. length defaults to 8 bits. Words lengths from 8 to 32 bits Using an integrated high-performance differential trans- are supported by writing the WORD_LENGTH register ceiver for link communication, a local SPI master can in the control interface using SSC. The internal FIFO is access remote slave devices up to 1200m using inexpen- always flushed at the start of transaction. sive CAT5 or other differential-pair type cabling. The SPI protocol supports four unique timing configura- The LTC4332 SPI extender solution can be inserted tions defined by the SCK polarity (CPOL) and clock phase into an existing SPI network with minimal impact. Write (CPHA) summarized in Table 1. accesses to remote slave devices are software transpar-
Table 1. SPI Mode
ent; however, read accesses from remote slaves incur a
CPOL CPHA SCK IDLE DATA CAPTURED DATA LAUNCHED
one-word latency. 0 0 Low Rising SCK Falling SCK 0 1 Low Falling SCK Rising SCK LOCAL MASTER LOCAL SLAVE SCK µP DEVICE 1 0 High Falling SCK Rising SCK MOSI MISO 1 1 High Rising SCK Falling SCK SS INT SS BREAK CONNECTIONS AND INSERT LTC4332 SOLUTION SCK LOCAL REMOTE (CPOL = 0) LOCAL SLAVE MASTER REMOTE MASTER SCK LOCAL LTC4332 LTC4332 REMOTE SLAVE (CPOL = 1) µP SPI BUS TWISTED SPI BUS DEVICE MCU_SCK PAIR REM_SCK Y A CAPTURE LAUNCH MCU_MOSI REM_MOSI MOSI, MISO MCU_MISO REM_MISO Z B (CPHA = 0) MCU_SS REM_SS A Y LAUNCH CAPTURE MCU_INT REM_INT MOSI, MISO B Z (CPHA = 1) REMOTE REMOTE V L 4332 F11 LOCAL SIDE REMOTE SIDE 4332 F10
Figure 11. SPI Mode Waveform Figure 10. LTC4332 Solution Inserted Into a SPI Network
When set to local mode, the LTC4332 SPI slave interface supports SPI modes (0,0) and (1,1) where (CPOL, CPHA).
Local Mode
The maximum SCK frequency is limited by fSCK:SLAVE and The LTC4332 is in slave SPI mode when the REMOTE Table 2 when accessing remote SPI slaves. The MISO pin is set low. Pins SCK and MOSI are inputs while pin pin is weakly held to the previously driven value when MISO is an output. Once the link status output pin LINK is all slave select pins are high. MISO is only driven after a Rev. A 12 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Switching Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuits Timing Diagram Applications Information Package Description Typical Application Related Parts