Datasheet MP6925A (Monolithic Power Systems) - 8

MP6925A – FAST TURN-OFF, CCM/DCM DUAL LLC SYNCHRONOUS RECTIFIER OPERATION
The MP6925A operates in discontinuous
Turn-On Phase
conduction mode (DCM), continuous When the switching current flows through the conduction mode (CCM), and critical MOSFET’s body diode, there is a negative conduction mode (CrCM). When the device voltage drop (VD - VSS) across the body diode. operates in DCM or CrCM, the control circuitry VDS falls below the turn-on threshold of the controls the gate in forward mode. The gate control circuitry (VLL-DS), which triggers a charge turns off when the MOSFET current is low. In current to turn on the MOSFET (see Figure 3). CCM, the control circuitry turns off the gate during very fast transients.
Turn-On Blanking
The control circuitry offers a blanking function
VD Clamp
that ensures the MOSFET remains on or off for Because VD1/2 can go as high as 180V, a high- tB_ON (about 1μs), which determines the voltage JFET is used at the input. To prevent

minimum turn-on time. During the turn-on excessive currents when VD1/2 drops below blanking period, the turn-off threshold is not -0.7V, place a 1kΩ resistor between VD1/2 and blanked completely and changes to about the drain of the external MOSFET.

100mV (instead of -VDRV-OFF 40mv).
Under-Voltage Lockout (UVLO)
This ensures that the part can always turn off, When VDD falls below the VDD UVLO threshold though it turns off more slowly during the turn- (about 3.75V), the MP6925A goes into sleep on blanking period. To avoid shoot-through, set mode and VG1/2 remains at a low level. the synchronous period below tB_ON during CCM in the LLC converter.
Enable
If the LL pin is pulled low, the MP6925A enters
Conduction Phase
shutdown mode, which consumes 175µA of When VDS rises above the forward voltage drop shutdown current. If LL is pulled high during the (-VFWD) according to the decrease in switching rectification cycle, the gate driver does not current, the MP6925A pulls down the gate appear until the next rectification cycle begins voltage. This eases the rise of VDS by (see Figure 2). increasing the resistance of the synchronous MOSFET.
VDS VDS -VDrv-Off -VFWD VLL_DS V Driver begins to GS be pulled down Will not start VGS Driver turns gate driver until off next cycle LL tB_ON tB_OFF Turn-On Turn-Off Blanking Blanking Figure 3: Turn-On/Off Diagram Figure 2: LL Control Scheme
Figure 3 shows how V
Thermal Shutdown
DS is adjusted to be about -VFWD, even when the current through the If the junction temperature of the chip exceeds MOSFET is fairly low. This function puts the the thermal shutdown threshold 150°C, VG1/2 driver voltage at a very low level when the pulls low, and the MP6925A stops switching. synchronous MOSFET turns off, which boosts The IC resumes normal function after the the turn-off speed. junction temperature drops by 10°C. MP6925A Rev. 1.0 www.MonolithicPower.com
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