Datasheet LNK3202, LNK3204-7, LNK3294, LNK3296 (Power Integrations) - 3

LinkSwitch-TN2 LinkSwitch-TN2 Functional Description
600 LinkSwitch-TN2 combines a high-voltage power MOSFET switch with 500 a power supply control er in one device. Unlike conventional PWM
V
(pulse width modulator) control ers, LinkSwitch-TN2 uses a simple
DRAIN PI-3660-081303
400 ON/OFF control to regulate the output voltage. The LinkSwitch-TN2 control er consists of an oscillator, feedback (sense and logic) circuit, 300 5.0 V regulator, BYPASS pin undervoltage circuit, over-temperature protection, line and output overvoltage protection, frequency jittering, current limit circuit, leading edge blanking and a 725 V or 900 V 200 power MOSFET. The LinkSwitch-TN2 incorporates additional circuitry for auto-restart. 100
Oscillator
0 The typical oscillator frequency is internal y set to an average of f 68 kHz OSC (66 kHz). Two signals are generated from the oscillator: the maximum 64 kHz duty cycle signal (DC ) and the clock signal that indicates the (MAX) beginning of each cycle. The LinkSwitch-TN2 oscillator incorporates circuitry that introduces a 0 20 small amount of frequency jitter, typical y 4 kHz peak-to-peak, to
Time (
µ
s)
minimize EMI emission. The modulation rate of the frequency jitter is Figure 5. Frequency Jitter. set to 1 kHz to optimize EMI reduction for both average and quasi- peak emissions. The frequency jitter should be measured with the and enters auto-restart when a current ≥I is delivered into the BPSD oscilloscope triggered at the falling edge of the DRAIN waveform. BYPASS pin. Adding an external Zener diode from the output voltage The waveform in Figure 5 il ustrates the frequency jitter of the to the BYPASS pin al ows implementing an hysteretic OVP function in LinkSwitch-TN2. a flyback converter (see Figure 6). The current into the BYPASS pin
Soft-Start
should be limited to less than 16 mA. At power-up or during a restart attempt in auto-restart, the device
BYPASS Pin Undervoltage
applies a soft-start by temporarily reducing the oscillator frequency The BYPASS pin undervoltage circuitry disables the power MOSFET to fOSC(SS) (typical y 33 kHz). Soft-start terminates either after 256 when the BYPASS pin voltage drops below V –V (approximately 4.5 V). switching cycles or if the output voltage reaches regulation. BP BPH Once the BYPASS pin voltage drops below this threshold, it must rise
Feedback Input Circuit
back to V to enable (turn-on) the power MOSFET. BP The feedback input circuit at the FEEDBACK pin consists of a low
Over-Temperature Protection
impedance source fol ower output set at V (2.0 V). When the FB The thermal shutdown circuitry senses the die temperature. The current delivered into this pin exceeds I (49 μA), a low logic level FB threshold is set at T (142 °C typical) with a 75 °C (T ) hysteresis. (disable) is generated at the output of the feedback circuit. This SD SDH When the die temperature rises above T the power MOSFET is output is sampled at the beginning of each cycle on the rising edge SD disabled and remains disabled until the die temperature fal s to of the clock signal. If high, the power MOSFET is turned on for that T –T , at which point it is re-enabled. cycle (enabled), otherwise the power MOSFET remains off (disabled). SD SDH The sampling is done only at the beginning of each cycle. Subse-
Current Limit
quent changes in the FEEDBACK pin voltage or current during the The current limit circuit senses the current in the power MOSFET. remainder of the cycle do not impact the MOSFET enable/disable When this current exceeds the internal threshold (I ), the power LIMIT status. If a current greater than I is injected into the feedback pin MOSFET is turned off for the remainder of that cycle. The leading FBSD while the MOSFET is enabled for at least two consecutive cycles the edge blanking circuit inhibits the current limit comparator for a short part will stop switching and enter auto-restart off-time. Normal time (t ) after the power MOSFET is turned on. This leading edge LEB switching resumes after the auto-restart off-time expires. This blanking time has been set so that current spikes caused by capaci- shutdown function al ows implementing line overvoltage protection in tance and rectifier reverse recovery time will not cause premature flyback converters (see Figure 6). The current into the FEEDBACK pin termination of the switching pulse. Current limit can be selected using should be limited to less than 1.2 mA. the BYPASS pin capacitor (0.1 μF for normal current limit / 1 μF for reduced current limit). LinkSwitch-TN2 selects between normal and
5.0 V Regulator and 5.2 V Shunt Voltage Clamp
reduced current limit at power-up prior to switching. The 5.0 V regulator charges the bypass capacitor connected to the BYPASS pin to V by drawing a current from the voltage on the
Auto-Restart
BP DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal In the event of a fault condition such as output overload, output

supply voltage node for the LinkSwitch-TN2. When the MOSFET is short, or an open-loop condition, LinkSwitch-TN2 enters into on, the LinkSwitch-TN2 runs off of the energy stored in the bypass auto-restart operation. An internal counter clocked by the oscillator capacitor. Extremely low power consumption of the internal circuitry gets reset every time the FEEDBACK pin is pulled high. If the al ows the LinkSwitch-TN2 to operate continuously from the current FEEDBACK pin is not pulled high for t (50 ms), the power AR(ON) drawn from the DRAIN pin. A bypass capacitor value of 0.1 μF is MOSFET switching is disabled for a time equal to the auto-restart sufficient for both high frequency decoupling and energy storage. off-time. The first time a fault is asserted the off-time is 150 ms (t First Off Period). If the fault condition persists, subsequent In addition, there is a shunt regulator clamping the BYPASS pin at AR(OFF) off-times are 1500 ms long (t Subsequent Periods). The V (5.2 V) when current is provided to the BYPASS pin through AR(OFF) BP(SHUNT) auto-restart alternately enables and disables the switching of the an external resistor. This facilitates powering of LinkSwitch-TN2 power MOSFET until the fault condition is removed. The auto-restart external y through a bias winding to decrease the no-load consump- counter is gated by the switch oscillator. tion to about 10 mW (flyback). The device stops switching instantly
3
Rev. M 10/20 www.power.com Document Outline Product Highlights Description Output Current Table Pin Functional Description LinkSwitch-TN2 Functional Description Applications Example Key Application Considerations Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Characteristics PDIP-8C (P Package) SMD-8C (G Package) SO-8C (D Package) PDIP-8C (P) and SMD-8C Package Marking SO-8C (D) Package Marking MSL Table ESD and Latch-Up Part Ordering Information