Datasheet MAX912, MAX913 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | Single/Dual, Ultra-Fast, Low-Power, Precision TTL Comparators |
| Páginas / Página | 11 / 3 — Single/Dual, Ultra-Fast, Low-Power. Precision TTL Comparators. … |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
Single/Dual, Ultra-Fast, Low-Power. Precision TTL Comparators. MAX912/MAX913. ELECTRICAL CHARACTERISTICS (continued). PARAMETER
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Single/Dual, Ultra-Fast, Low-Power Precision TTL Comparators MAX912/MAX913 ELECTRICAL CHARACTERISTICS (continued)
V+ = +5V, V- = -5V, VQ = 1.4V, VLE = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
TA = +25°C 10 14 ∆VIN = 100mV, VOD = 5mV TA = TMIN TO TMAX 16 Propagation Delay (Note 4) tPD+, tPD- ns T ∆V A = +25°C 9 12 IN = 100mV, VOD = 20mV TA = TMIN TO TMAX 15 Differential Propagation Delay MAX913 2 4 ∆ ∆V t IN = 100mV, PD TA = +25°C ns (Note 4) VOD = 5mV MAX912 3 5 ∆VIN = 100mV, Channel-to-Channel Propagation VOD = 5mV T Delay (Note 4) A = +25°C 500 ps (MAX912 only) Latch Setup Time (Note 5) tSU 2 0 ns Latch Hold Time (Note 5) tH 5 2 ns Latch Propagation Delay (Note 6) tLPD 7 ns
Note 1:
All specifications are 100% tested at TA = +25°C, unless otherwise noted. Specification limits over temperature (TA = TMIN to TMAX) are guaranteed by design.
Note 2:
Input Offset Voltage (VOS) is defined as the average of the two input offset voltages, measured by forcing first one output, then the other to 1.4V. Input Offset Current (IOS) is defined the same way.
Note 3:
Supply currents are measured with VQ driven to both VOH and VOL (not 1.4V).
Note 4:
Propagation Delay (tPD) and Differential Propagation Delay (∆tPD) cannot be measured in automatic handling equipment with low input overdrive values. Characterization and correlation tests have shown that tPD and ∆tPD limits can be guaran- teed by design. Electrical Characteristic DC tests are performed to guarantee that all internal bias conditions are correct. For low overdrive conditions, VOS is added to overdrive. Differential Propagation Delay is defined as ∆tPD = tPD+ - tPD-.
Note 5:
Input latch setup time (tSU) is the interval in which the input signal must be stable prior to asserting the latch signal. The hold time (tH) is the interval after the latch is asserted in which the input signal must be stable. These parameters are guaranteed by design.
Note 6:
Latch Propagation Delay (tLPD) is the delay time for the output to respond when the latch-enable pin is deasserted (see Timing Diagram).
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V+ = +5V, V- = -5V, VQ = 1.4V, VLE = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
TA = +25°C 10 14 ∆VIN = 100mV, VOD = 5mV TA = TMIN TO TMAX 16 Propagation Delay (Note 4) tPD+, tPD- ns T ∆V A = +25°C 9 12 IN = 100mV, VOD = 20mV TA = TMIN TO TMAX 15 Differential Propagation Delay MAX913 2 4 ∆ ∆V t IN = 100mV, PD TA = +25°C ns (Note 4) VOD = 5mV MAX912 3 5 ∆VIN = 100mV, Channel-to-Channel Propagation VOD = 5mV T Delay (Note 4) A = +25°C 500 ps (MAX912 only) Latch Setup Time (Note 5) tSU 2 0 ns Latch Hold Time (Note 5) tH 5 2 ns Latch Propagation Delay (Note 6) tLPD 7 ns
Note 1:
All specifications are 100% tested at TA = +25°C, unless otherwise noted. Specification limits over temperature (TA = TMIN to TMAX) are guaranteed by design.
Note 2:
Input Offset Voltage (VOS) is defined as the average of the two input offset voltages, measured by forcing first one output, then the other to 1.4V. Input Offset Current (IOS) is defined the same way.
Note 3:
Supply currents are measured with VQ driven to both VOH and VOL (not 1.4V).
Note 4:
Propagation Delay (tPD) and Differential Propagation Delay (∆tPD) cannot be measured in automatic handling equipment with low input overdrive values. Characterization and correlation tests have shown that tPD and ∆tPD limits can be guaran- teed by design. Electrical Characteristic DC tests are performed to guarantee that all internal bias conditions are correct. For low overdrive conditions, VOS is added to overdrive. Differential Propagation Delay is defined as ∆tPD = tPD+ - tPD-.
Note 5:
Input latch setup time (tSU) is the interval in which the input signal must be stable prior to asserting the latch signal. The hold time (tH) is the interval after the latch is asserted in which the input signal must be stable. These parameters are guaranteed by design.
Note 6:
Latch Propagation Delay (tLPD) is the delay time for the output to respond when the latch-enable pin is deasserted (see Timing Diagram).
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