Datasheet MCP6V76 (Microchip) - 9

MCP6V76/6U/7/9 Note:
Unless otherwise indicated, TA = +25°C, VDD = +2V to 5.5V, VSS = GND, VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 20 kΩ to VL and CL = 30 pF.
1m 1,000 800 V = 5.5 V 100µ DD 600 T = 85ºC A 10µ 400 200 Input Offset Current 1µ Offset Currents 0 (pA) 100n -200 Input Bias Current -400 T = +125°C A 10n T = +85°C -600 A T = +25°C A -800 1n T = -40°C A Input Bias and -1,000 Input Current Magnitude (A) 100p -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Common Mode Voltage (V) Input Voltage (V) FIGURE 2-12:
Input Bias and Offset
FIGURE 2-15:
Input Bias Current vs. Input Currents vs. Common Mode Input Voltage with Voltage (below VSS). TA = +85°C.
1000 V = 5.5 V 800 DD T = 125ºC 600 A 400 Input Bias Current 200 Offset Currents 0 (pA) Input Offset Current -200 -400 -600 -800 Input Bias and -1000 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Input Common Mode Voltage (V) FIGURE 2-13:
Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C.
1000 1n V = 5.5 V DD 100 Input Offset Current 100p Currents (A) 10 10p Input Bias Current 11 p Input Bias, Offset 0.1 0.1p 25 35 45 55 65 75 85 95 105 115 125 Ambient Temperature (°C) FIGURE 2-14:
Input Bias and Offset Currents vs. Ambient Temperature with VDD = +5.5V.  2020 Microchip Technology Inc. DS20006323B-page 9 Document Outline 170 µA, 2 MHz Zero-Drift Op Amps Features Typical Applications Design Aids Related Parts Description Package Types Typical Application Circuit 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start Up. FIGURE 1-2: Offset Correction Settling Time. FIGURE 1-3: Output Overdrive Recovery. 1.4 Test Circuits FIGURE 1-4: AC and DC Test Circuit for Most Noninverting Gain Conditions. FIGURE 1-5: AC and DC Test Circuit for Most Inverting Gain Conditions. FIGURE 1-6: Test Circuit for Dynamic Input Behavior. 2.0 Typical Performance Curves 2.1 DC Input Precision FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage Quadratic Temp. Co. FIGURE 2-4: Input Offset Voltage vs. Power Supply Voltage with VCM = VCML. FIGURE 2-5: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMH. FIGURE 2-6: Input Offset Voltage vs. Output Voltage with VDD = 2.0V. FIGURE 2-7: Input Offset Voltage vs. Output Voltage with VDD = 5.5V. FIGURE 2-8: Input Offset Voltage vs. Common Mode Voltage with VDD = 2V. FIGURE 2-9: Input Offset Voltage vs. Common Mode Voltage with VDD = 5.5V. FIGURE 2-10: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-11: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-12: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-13: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-14: Input Bias and Offset Currents vs. Ambient Temperature with VDD = +5.5V. FIGURE 2-15: Input Bias Current vs. Input Voltage (below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-16: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature. FIGURE 2-17: Output Voltage Headroom vs. Output Current. FIGURE 2-18: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-19: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-20: Supply Current vs. Power Supply Voltage. FIGURE 2-21: Power-On Reset Voltage vs. Ambient Temperature. 2.3 Frequency Response FIGURE 2-22: CMRR and PSRR vs. Frequency. FIGURE 2-23: Open-Loop Gain vs. Frequency with VDD = 2V. FIGURE 2-24: Open-Loop Gain vs. Frequency with VDD = 5.5V. FIGURE 2-25: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-26: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-27: Gain Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-28: Closed-Loop Output Impedance vs. Frequency with VDD = 2V. FIGURE 2-29: Closed-Loop Output Impedance vs. Frequency with VDD = 5.5V. FIGURE 2-30: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-31: EMIRR vs Frequency. FIGURE 2-32: EMIRR vs RF Input Peak Voltage. FIGURE 2-33: Channel-to-Channel Separation vs. Frequency. 2.4 Input Noise and Distortion FIGURE 2-34: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-35: Input Noise Voltage Density vs. Input Common Mode Voltage. FIGURE 2-36: Intermodulation Distortion vs. Frequency with VCM Disturbance (see Figure 1-6). FIGURE 2-37: Intermodulation Distortion vs. Frequency with VDD Disturbance (see Figure 1-6). FIGURE 2-38: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 2V. FIGURE 2-39: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 5.5V. 2.5 Time Response FIGURE 2-40: Input Offset Voltage vs. Time at Power-Up. FIGURE 2-41: The MCP6V76/6U/7/9 Family Shows No Input Phase Reversal with Overdrive. FIGURE 2-42: Noninverting Small Signal Step Response. FIGURE 2-43: Noninverting Large Signal Step Response. FIGURE 2-44: Inverting Small Signal Step Response. FIGURE 2-45: Inverting Large Signal Step Response. FIGURE 2-46: Slew Rate vs. Ambient Temperature. FIGURE 2-47: Output Overdrive Recovery vs. Time with G = -10 V/V. FIGURE 2-48: Output Overdrive Recovery Time vs. Inverting Gain. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Overview of Zero-Drift Operation FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. 4.2 Other Functional Blocks FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs Against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. 4.3 Application Tips FIGURE 4-7: Output Resistor, RISO, Stabilizes Capacitive Loads. FIGURE 4-8: Recommended RISO Values for Capacitive Loads. FIGURE 4-9: Output Load. FIGURE 4-10: Amplifier with Parasitic Capacitance. 4.4 Typical Applications FIGURE 4-11: Simple Design. FIGURE 4-12: RTD Sensor. FIGURE 4-13: Offset Correction. FIGURE 4-14: Precision Comparator. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration and Evaluation Boards 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Revision B (April 2020) Revision A (March 2020) Product Identification System Trademarks Worldwide Sales and Service