Datasheet VIA2000SD (Vishay) - 10
| Fabricante | Vishay |
| Descripción | High Reliability Reinforced Isolated Amplifier in SOP-8 (300 mil) Package |
| Páginas / Página | 12 / 10 — VIA2000SD. APPLICATION NOTE Typical Application Circuit. Shunt Resistor … |
| Formato / tamaño de archivo | PDF / 197 Kb |
| Idioma del documento | Inglés |
VIA2000SD. APPLICATION NOTE Typical Application Circuit. Shunt Resistor Selection. PCB Layout
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VIA2000SD
www.vishay.com Vishay Semiconductors
APPLICATION NOTE Typical Application Circuit
VIA2000SD has an input impedance of up to 1 GΩ, and has a wide input voltage range as well. These features make VIA2000SD ideally suitable for isolated voltage sensing applications such as frequency inverters. The typical application circuit is shown in Fig. 17. The bus voltage of the frequency inverter is divided by a resistance network, and the divided voltage is applied to the input of VIA2000SD through a RC filter. The differential output of the isolated amplifier is converted to a single-ended analog output with an operational amplifier based circuit. An analog to digital converter usually receives the analog output and converts to digital signal for controller processing. VBUS+ Gate Gate Gate R1 driver driver driver R2 M Gate Gate Gate Rsense driver driver driver VBUS- VIA2000SD 3.0 V to 0.1 μF 5.5 V V V IN DD2 2.2 μF 3.0 V to SHTDN GND2 5.5 V V OUT DD1 P 2.2 μF 0.1 μF GND OUT To ADC 1 N Fig. 17 - Typical Application Circuit in Voltage Sensing
Shunt Resistor Selection
There are two other factors should be considered when selecting the sense resistor: • The voltage-drop on Rsense divided by nominal VBUS must not exceed the recommended linear input voltage range: VIN ≤ FSR • The voltage-drop on Rsense divided by VBUS in maximum allowed overvoltage condition must not exceed the input voltage that causes a clipping output: VIN ≤ VClipping
PCB Layout
There are some key guidelines or considerations for optimizing performance in PCB layout: • VIA2000SD requires a 0.1 μF bypass capacitor between VDD1 and GND1, VDD2 and GND2. The capacitor should be placed as close as possible to the VDD pin. If better filtering is required, an additional 1 μF to 10 μF capacitor may be used Rev. 1.1, 02-Apr-2025
10
Document Number: 80902 For technical questions, contact: optocoupleranswers@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
www.vishay.com Vishay Semiconductors
APPLICATION NOTE Typical Application Circuit
VIA2000SD has an input impedance of up to 1 GΩ, and has a wide input voltage range as well. These features make VIA2000SD ideally suitable for isolated voltage sensing applications such as frequency inverters. The typical application circuit is shown in Fig. 17. The bus voltage of the frequency inverter is divided by a resistance network, and the divided voltage is applied to the input of VIA2000SD through a RC filter. The differential output of the isolated amplifier is converted to a single-ended analog output with an operational amplifier based circuit. An analog to digital converter usually receives the analog output and converts to digital signal for controller processing. VBUS+ Gate Gate Gate R1 driver driver driver R2 M Gate Gate Gate Rsense driver driver driver VBUS- VIA2000SD 3.0 V to 0.1 μF 5.5 V V V IN DD2 2.2 μF 3.0 V to SHTDN GND2 5.5 V V OUT DD1 P 2.2 μF 0.1 μF GND OUT To ADC 1 N Fig. 17 - Typical Application Circuit in Voltage Sensing
Shunt Resistor Selection
There are two other factors should be considered when selecting the sense resistor: • The voltage-drop on Rsense divided by nominal VBUS must not exceed the recommended linear input voltage range: VIN ≤ FSR • The voltage-drop on Rsense divided by VBUS in maximum allowed overvoltage condition must not exceed the input voltage that causes a clipping output: VIN ≤ VClipping
PCB Layout
There are some key guidelines or considerations for optimizing performance in PCB layout: • VIA2000SD requires a 0.1 μF bypass capacitor between VDD1 and GND1, VDD2 and GND2. The capacitor should be placed as close as possible to the VDD pin. If better filtering is required, an additional 1 μF to 10 μF capacitor may be used Rev. 1.1, 02-Apr-2025
10
Document Number: 80902 For technical questions, contact: optocoupleranswers@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000