Datasheet SR6P3EC4 (STMicroelectronics) - 4
| Fabricante | STMicroelectronics |
| Descripción | 32-bit Arm Cortex R52+ automotive integration MCU 4 Cortex R52+ cores, 19.5 MB xMemory, 1.8 MB RAM, with embedded virtualization, safety, and security in FPBGA292 package |
| Páginas / Página | 10 / 4 — SR6P3EC4 SR6P3EC6. Introduction. Feature. SR6P3EC4 and SR6P3EC6. DB5468. … |
| Formato / tamaño de archivo | PDF / 572 Kb |
| Idioma del documento | Inglés |
SR6P3EC4 SR6P3EC6. Introduction. Feature. SR6P3EC4 and SR6P3EC6. DB5468. Rev 4. page 4/10
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SR6P3EC4 SR6P3EC6 Introduction Feature SR6P3EC4 and SR6P3EC6
SPIQ (with LVDS channel) 10 (2) Microsecond channel (MSC) 2 Unit 2 SENT Channel/unit 10 I²C 2 Unit 2 PSI5 Channel/unit 1 channel FlexRay™ (dual channel) 1 Total 1 10/100/1000 Mbit/s Ethernet IEEE 802.3-2008 compliant With MII, RMII, RGMII, and 10BASE-T1S/ 1 OA3pin(1) SIPI/LFAST interprocessor bus 1 Yes 5 MCS (multithreading cores), 40 channels, 120 KB RAM Generic timer modules GTM4134 5 TIM (8 channels each) 3 TOM (16 channels each) 6 ATOM (8 channels each) 4 TIO (8 channels each) High-resolution timer 2 × 8 channels 12-bit SAR analog converters 12 16-bit sigma-delta analog converters (units with DSPL) 10 9-bit SAR analog comparators 4 units (2 channels each) Octo-SPI (support HyperBus™ memory devices) No Main debug port (JTAG+SWD) Yes Debug port Secondary debug port (SWD) Yes High-speed off-chip trace lane (multi Gbit/s, Aurora™ protocol) 1 Maximum temperature (target) Junction temperature 150°C FPBGA516 — FPBGA476 X Packages FPBGA348 — FPBGA292 X 1. Optional (depending on the ordered part number).
DB5468
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Rev 4 page 4/10
Document Outline SR6P3EC4 SR6P3EC6 Features 1 Introduction 1.1 Document overview 1.2 Description 1.3 Block diagram 2 Ordering information Revision history Glossary ADC AEC AES ASIL ATOM CAN CAN FD® CAN XL® CPU CRC DCF DMA DSP eDMA EMC EVITA FCCU FPBGA FPU GB GPIO GTM HSM I/O I2C IEC IEEE IPv4 IPv6 ISO JTAG KB LIN LVDS M_TTCAN MB MCAN MCS MCU MII NoC NPU NVM OA3p OS OSR OTA PHY PLL PSI5 RAM RGMII RMII SAR SDADC SENT SIMD SIPI SPI SPIQ SRAM SRC ST SWD TIM TIO TOM UART VLAN xMemory XS_CAN
SR6P3EC4 SR6P3EC6 Introduction Feature SR6P3EC4 and SR6P3EC6
SPIQ (with LVDS channel) 10 (2) Microsecond channel (MSC) 2 Unit 2 SENT Channel/unit 10 I²C 2 Unit 2 PSI5 Channel/unit 1 channel FlexRay™ (dual channel) 1 Total 1 10/100/1000 Mbit/s Ethernet IEEE 802.3-2008 compliant With MII, RMII, RGMII, and 10BASE-T1S/ 1 OA3pin(1) SIPI/LFAST interprocessor bus 1 Yes 5 MCS (multithreading cores), 40 channels, 120 KB RAM Generic timer modules GTM4134 5 TIM (8 channels each) 3 TOM (16 channels each) 6 ATOM (8 channels each) 4 TIO (8 channels each) High-resolution timer 2 × 8 channels 12-bit SAR analog converters 12 16-bit sigma-delta analog converters (units with DSPL) 10 9-bit SAR analog comparators 4 units (2 channels each) Octo-SPI (support HyperBus™ memory devices) No Main debug port (JTAG+SWD) Yes Debug port Secondary debug port (SWD) Yes High-speed off-chip trace lane (multi Gbit/s, Aurora™ protocol) 1 Maximum temperature (target) Junction temperature 150°C FPBGA516 — FPBGA476 X Packages FPBGA348 — FPBGA292 X 1. Optional (depending on the ordered part number).
DB5468
-
Rev 4 page 4/10
Document Outline SR6P3EC4 SR6P3EC6 Features 1 Introduction 1.1 Document overview 1.2 Description 1.3 Block diagram 2 Ordering information Revision history Glossary ADC AEC AES ASIL ATOM CAN CAN FD® CAN XL® CPU CRC DCF DMA DSP eDMA EMC EVITA FCCU FPBGA FPU GB GPIO GTM HSM I/O I2C IEC IEEE IPv4 IPv6 ISO JTAG KB LIN LVDS M_TTCAN MB MCAN MCS MCU MII NoC NPU NVM OA3p OS OSR OTA PHY PLL PSI5 RAM RGMII RMII SAR SDADC SENT SIMD SIPI SPI SPIQ SRAM SRC ST SWD TIM TIO TOM UART VLAN xMemory XS_CAN