Datasheet InnoSwitch3-Pro (Power Integrations) - 8

FabricantePower Integrations
DescripciónDigitally Controllable Off-Line CV/CC QR Flyback Switcher IC with Integrated High-Voltage Switch, Synchronous Rectification and FluxLink Feedback
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InnoSwitch3-Pro. Open SR Protection. Maximum Secondary Inhibit Period. Intelligent Quasi-Resonant Mode Switching

InnoSwitch3-Pro Open SR Protection Maximum Secondary Inhibit Period Intelligent Quasi-Resonant Mode Switching

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InnoSwitch3-Pro
(at f operation). “ON” device to pull the pin low and reduce any voltage on the SR gate SREQ due to capacitive coupling from the FORWARD pin. After hand-shake is completed the secondary control er linearly ramps up the switching frequency from f to f over the t time
Open SR Protection
SW SREQ SS(RAMP) period. In order to protect against an open SYNCHRONOUS RECTIFIER DRIVE pin system fault the secondary control er has a protection In the event of a short-circuit or overload at start-up, the device will mode to ensure the SYNCHRONOUS RECTIFIER DRIVE pin is move directly into CC (constant-current) mode. The device will go connected to an external FET. At start-up the control er will apply a into auto-restart (AR), if the output voltage does not rise above the current to the SYNCHRONOUS RECTIFIER DRIVE pin; an internal 3.6 V before the expiration of the soft start timer (t ) after SS(RAMP) threshold will correlate to a capacitance of 100 pF. If the external handshake has occurred. capacitance on the SYNCHRONOUS RECTIFIER DRIVE pin is below If the output voltage reaches regulation within the t time 100 pF the resulting voltage is above the reference voltage, and the SS(RAMP) period, the frequency ramp is immediately aborted and the secondary device will assume the SYNCHRONOUS RECTIFIER DRIVE pin is control er is permitted to go full frequency. This will al ow the “open” and there is no FET to drive. If the pin capacitance detected control er to maintain regulation in the event of a sudden transient is above 100 pF (the resulting voltage is below the reference voltage), loading soon after regulation is achieved. The frequency ramp will the control er will assume an SR FET is connected. only be aborted if quasi-resonant-detection programming has already In the event the SYNCHRONOUS RECTIFIER DRIVE pin is detected to occurred. be open, the secondary control er will stop requesting pulses from
Maximum Secondary Inhibit Period
the primary to initiate auto-restart. Secondary requests to initiate primary switching are inhibited to If the SYNCHRONOUS RECTIFIER DRIVE pin is tied to ground at maintain operation below maximum frequency and ensure minimum start-up, the SR drive function is disabled and the open off-time. Besides these constraints, secondary-cycle requests are SYNCHRONOUS RECTIFIER DRIVE pin protection mode is also also inhibited during the “ON” time cycle of the primary switch (time disabled. between the cycle request and detection of FORWARD pin falling edge). The maximum time-out in the event that a FORWARD pin
Intelligent Quasi-Resonant Mode Switching
falling edge is not detected after a cycle requested is ~30 ms. In order to improve conversion efficiency and reduce switching losses, the InnoSwitch3-Pro features a means to force switching
Output Voltage Weak Bleeder
when the voltage across the primary switch is near its minimum In the event that the sensed voltage on the OUTPUT VOLTAGE pin is voltage when the converter operates in discontinuous conduction slightly higher than the regulation threshold, a bleed current of ~2.5 mode (DCM). This mode of operation is automatical y engaged in mA (3 mA max) is applied on the OUTPUT VOLTAGE pin (weak bleed). DCM and disabled once the converter moves to continuous- The current sink on the OUTPUT VOLTAGE pin is intended to conduction mode (CCM). See Figure 8. discharge the output voltage after momentary overshoot events. The secondary does not relinquish control to the primary during this mode Rather than detecting the magnetizing ring val ey on the primary- of operation. side, the peak voltage of the FORWARD pin voltage as it rises above
SECONDARY BYPASS Pin Overvoltage Protection
the output voltage level is used to gate secondary requests to initiate The InnoSwitch3-Pro secondary control er features a SECONDARY the switch “ON” cycle in the primary control er. BYPASS pin OV feature similar to PRIMARY BYPASS pin OV feature. The secondary control er detects when the control er enters in When the secondary is in control, in the event that the SECONDARY discontinuous-mode and opens secondary cycle request windows BYPASS pin current exceeds I the secondary will initiate a fault BPS(SD) corresponding to minimum switching voltage across the primary response dictated by sec-fault response. power switch.
SR Disable Protection
Quasi-Resonant (QR) mode is enabled for 20 msec after DCM is In each cycle SR is only engaged if a set cycle was requested by the detected. QR switching is disabled after 20 msec, at which point secondary control er and the negative edge is detected on the switching may occur at any time a secondary request is initiated. FORWARD pin. In the event that the voltage on the ISENSE pin exceeds approximately 3 times the CC threshold, the SR FET drive is The secondary control er includes blanking of ~1 ms to prevent false disabled until the surge current has diminished to nominal levels. detection of primary “ON” cycle when the FORWARD pin rings below ground.
SR Static Pull-Down
To ensure that the SR gate is held low when the secondary is not in control, the SYNCHRONOUS RECTIFIER DRIVE pin has a nominal y
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Rev. G 07/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-Pro Functional Description Primary Controller Secondary Controller Register Definition Command Registers Telemetry (Read-back) Registers I2C Connection I2C Example Waveforms Applications Example Key application Considerations Selection of Components Components for InnoSwitch3-Pro IC Primary-Side Circuit Components for InnoSwitch3-PRO Secondary-Side Circuit Recommendations for Circuit Board Layout Layout Example Recommendations for Transformer Design Application Considerations for INN3379C and INN3370C Only Quick Design Checklist Theremal Resistance Test Conditions for INN3379C and INN3370C Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Curves InSOP-24D Package Drawing Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information