link to page 9 link to page 9 24C01C6.0WRITE OPERATIONS After the receipt of each word, the four lower order Address Pointer bits are internally incremented by one. 6.1Byte Write The higher order four bits of the word address remains constant. If the master should transmit more than 16 Following the Start signal from the master, the device bytes prior to generating the Stop condition, the code (4 bits), the Chip Select bits (3 bits), and the R/W address counter will roll over and the previously bit, which is a logic low, is placed onto the bus by the received data will be overwritten. As with the byte write master transmitter. The device will acknowledge this operation, once the Stop condition is received an control byte during the ninth clock pulse. The next byte internal write cycle will begin (Figure 6-2). transmitted by the master is the word address and will be written into the Address Pointer of the 24C01C. After receiving another Acknowledge signal from the Note: Page write operations are limited to writ- 24C01C the master device will transmit the data word ing bytes within a single physical page, to be written into the addressed memory location. The regardless of the number of bytes actu- 24C01C acknowledges again and the master gener- ally being written. Physical page boundar- ates a Stop condition. This initiates the internal write ies start at addresses that are integer cycle, and during this time the 24C01C wil not multiples of the page buffer size (or ‘page generate Acknowledge signals (Figure 6-1). size’) and end at addresses that are integer multiples of [page size – 1]. If a 6.2Page Write Page Write command attempts to write across a physical page boundary, the The write control byte, word address and the first data result is that the data wraps around to the byte are transmitted to the 24C01C in the same way as beginning of the current page (overwriting in a byte write. But instead of generating a Stop data previously stored there), instead of condition, the master transmits up to 15 additional data being written to the next page as might be bytes to the 24C01C which are temporarily stored in expected. It is therefore necessary for the the on-chip page buffer and will be written into the application software to prevent page write memory after the master has transmitted a Stop operations that would attempt to cross a condition. page boundary. FIGURE 6-1:BYTE WRITE S S Bus Activity T Control Word T Master A R Byte Address Data O T P SDA Line S P A A A Bus Activity C C C K K K FIGURE 6-2:PAGE WRITE S Bus Activity T S Master A Control Word T R Byte Address (n) Data n Data n +1 Data n + 15 O T P SDA Line S P A A A A A Bus Activity C C C C C K K K K K 1997-2012 Microchip Technology Inc. DS21201K-page 9 Document Outline 24C01C Features: Description: Block Diagram Package Types 1.0 Electrical Characteristics Absolute Maximum Ratings(†) TABLE 1-1: DC Characteristics TABLE 1-2: AC Characteristics FIGURE 1-1: Bus Timing Data 2.0 Pin Descriptions TABLE 2-1: Pin Function Table 2.1 SDA Serial Data 2.2 SCL Serial Clock 2.3 A0, A1, A2 2.4 Test 2.5 Noise Protection 3.0 Functional Description 4.0 Bus Characteristics 4.1 Bus Not Busy (A) 4.2 Start Data Transfer (B) 4.3 Stop Data Transfer (C) 4.4 Data Valid (D) 4.5 Acknowledge FIGURE 4-1: Data Transfer Sequence on the Serial Bus FIGURE 4-2: Acknowledge Timing 5.0 Device Addressing FIGURE 5-1: Control Byte Format 5.1 Contiguous Addressing Across Multiple Devices 6.0 Write Operations 6.1 Byte Write 6.2 Page Write FIGURE 6-1: Byte Write FIGURE 6-2: Page Write 7.0 Acknowledge Polling FIGURE 7-1: Acknowledge Polling Flow 8.0 Read Operation 8.1 Current Address Read FIGURE 8-1: Current Address Read 8.2 Random Read 8.3 Sequential Read FIGURE 8-2: Random Read FIGURE 8-3: Sequential Read 9.0 Packaging Information 9.1 Package Marking Information Appendix A: Revision History The Microchip Web Site Customer Change Notification Service Customer Support Reader Response Product Identification System Trademarks Worldwide Sales