Datasheet ARG81800 (Allegro) - 2
| Fabricante | Allegro |
| Descripción | 40 V, 500 mA / 1.0 A Synchronous Buck Regulators with Ultralow Quiescent Current, SYNCIN, CLKOUT, and PGOOD |
| Páginas / Página | 42 / 2 — 40 V, 500 mA / 1.0 A Synchronous Buck Regulators. ARG81800. with Ultralow … |
| Formato / tamaño de archivo | PDF / 4.0 Mb |
| Idioma del documento | Inglés |
40 V, 500 mA / 1.0 A Synchronous Buck Regulators. ARG81800. with Ultralow Quiescent Current, SYNCIN, CLKOUT, and PGOOD
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40 V, 500 mA / 1.0 A Synchronous Buck Regulators ARG81800 with Ultralow Quiescent Current, SYNCIN, CLKOUT, and PGOOD FEATURES AND BENEFITS DESCRIPTION
• Enable input can command ultralow 1 µA shutdown current The ARG81800 has external compensation, so it can be tuned to • Open-drain PGOOD output with rising delay satisfy a wide range of system goals with many different external • Pre-bias startup allows quick restart and avoids reset components over a wide range of PWM frequencies. The ARG81800 • Overvoltage, pulse-by-pulse current limit, hiccup mode short includes adjustable soft start to minimize inrush current. The circuit, and thermal protections ARG81800 monitors the feedback voltage to provide an open-drain • Robust FMEA: pin open/short and component faults power good signal. The Enable input can command an ultra-low current shutdown mode with VOUT = 0 V. Extensive protection features of the ARG81800 include pulse-by- pulse current limit, hiccup mode short circuit protection, BOOT open/short voltage protection, VIN undervoltage lockout, VOUT overvoltage protection, and thermal shutdown. The ARG81800 is supplied in a low profile 20-pin wettable flank QFN package (suffix “ES”) with exposed power pad.
SELECTION GUIDE Part Number DC Current Package Packing Lead Frame
ARG81800KESJSR 1 A 20-pin wettable flank QFN package with thermal pad 6000 pieces per 13-inch reel 100% matte tin ARG81800KESJSR-1 0.5 A *Contact Allegro for additional packing options
Table of Contents
Features and Benefits ... 1 Low-Power (LP) Mode ... 20 Description .. 1 Protection Features ... 21 Package ... 1 Undervoltage Lockout (UVLO) .. 21 Typical Application Diagram ... 1 Pulse-by-Pulse Peak Current Protection (PCP) ... 21 Selection Guide ... 2 Overcurrent Protection (OCP) and Hiccup Mode ... 21 Absolute Maximum Ratings ... 3 BOOT Capacitor Protection .. 22 Thermal Characteristics .. 3 Asynchronous Diode Protection .. 22 Functional Block Diagram ... 4 Overvoltage Protection (OVP) ... 22 Pinout Diagram and Terminal List ... 5 SW Pin Protection ... 22 Electrical Characteristics ... 6 Pin-to-Ground and Pin-to-Short Protections .. 22 Typical Performance Characteristics ..11 Thermal Shutdown (TSD) ... 23 Functional Description .. 16 Application Information ... 25 Overview ... 16 Design and Component Selection ... 25 Reference Voltage .. 16 PWM Switching Frequency (RFSET) ... 25 Internal VREG Regulator ... 16 Output Voltage Setting ... 25 Oscillator/Switching Frequency ... 16 Output Inductor (LO) .. 26 Synchronization (SYNCIN) and Clock Output (CLKOUT) .. 16 Output Capacitors (CO) .. 27 Frequency Dither .. 16 Output Voltage Ripple – Ultralow-IQ LP Mode ... 28 Transconductance Error Amplifier ... 17 Input Capacitors .. 29 Compensation Components ... 18 Bootstrap Capacitor ... 29 Power MOSFETs .. 18 Soft Start and Hiccup Mode Timing (CSS) ... 29 BOOT Regulator ... 18 Compensation Components (RZ, CZ, and CP) ... 30 Soft Start (Startup) and Inrush Current Control ... 18 Power Stage ... 30 Slope Compensation ... 18 Error Amplifier ... 31 Pre-Biased Startup .. 19 A Generalized Tuning Procedure ... 32 Dropout ... 19 Power Dissipation and Thermal Calculations ... 34 PGOOD Output .. 19 EMI/EMC Aware PCB Design .. 36 Current Sense Amplifier ... 19 Typical Reference Designs .. 39 Pulse-Width Modulation (PWM) .. 19 Package Outline Drawing .. 41 2 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Package Typical Application Diagram Selection Guide Absolute Maximum Ratings Thermal Characteristics Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Typical Performance Characteristics Functional Description Overview Reference Voltage Internal VREG Regulator Oscillator/Switching Frequency Synchronization (SYNCIN) and Clock Output (CLOCKOUT) Frequency Dither Transconductance Error Amplifier Compensation Components Power MOSFETs BOOT Regulator Soft Start (Startup) and Inrush Current Control Slope Compensation Pre-Biased Startup Dropout PGOOD Output Current Sense Amplifier Pulse-Width Modulation (PWM) Low-Power (LP) Mode Protection Features Undervoltage Lockout (UVLO) Pulse-by-Pulse Peak Current Protection (PCP) Overcurrent Protection (OCP) and Hiccup Mode BOOT Capacitor Protection Asynchronous Diode Protection Overvoltage Protection (OVP) SW Pin Protection Pin-to-Ground and Pin-to-Short Protections Thermal Shutdown (TSD) Application Information Design and Component Selection PWM Switching Frequency (RFSET) Output Voltage Setting Output Inductor (LO) Output Capacitors (CO) Output Voltage Ripple – Ultralow-IQ LP Mode Input Capacitors Bootstrap Capacitor Soft Start and Hiccup Mode Timing (CSS) Compensation Components (RZ, CZ, and CP) Power Stage Error Amplifier A Generalized Tuning Procedure Power Dissipation and Thermal Calculations EMI/EMC Aware PCB Design Typical Reference Designs Package Outline Drawing
40 V, 500 mA / 1.0 A Synchronous Buck Regulators ARG81800 with Ultralow Quiescent Current, SYNCIN, CLKOUT, and PGOOD FEATURES AND BENEFITS DESCRIPTION
• Enable input can command ultralow 1 µA shutdown current The ARG81800 has external compensation, so it can be tuned to • Open-drain PGOOD output with rising delay satisfy a wide range of system goals with many different external • Pre-bias startup allows quick restart and avoids reset components over a wide range of PWM frequencies. The ARG81800 • Overvoltage, pulse-by-pulse current limit, hiccup mode short includes adjustable soft start to minimize inrush current. The circuit, and thermal protections ARG81800 monitors the feedback voltage to provide an open-drain • Robust FMEA: pin open/short and component faults power good signal. The Enable input can command an ultra-low current shutdown mode with VOUT = 0 V. Extensive protection features of the ARG81800 include pulse-by- pulse current limit, hiccup mode short circuit protection, BOOT open/short voltage protection, VIN undervoltage lockout, VOUT overvoltage protection, and thermal shutdown. The ARG81800 is supplied in a low profile 20-pin wettable flank QFN package (suffix “ES”) with exposed power pad.
SELECTION GUIDE Part Number DC Current Package Packing Lead Frame
ARG81800KESJSR 1 A 20-pin wettable flank QFN package with thermal pad 6000 pieces per 13-inch reel 100% matte tin ARG81800KESJSR-1 0.5 A *Contact Allegro for additional packing options
Table of Contents
Features and Benefits ... 1 Low-Power (LP) Mode ... 20 Description .. 1 Protection Features ... 21 Package ... 1 Undervoltage Lockout (UVLO) .. 21 Typical Application Diagram ... 1 Pulse-by-Pulse Peak Current Protection (PCP) ... 21 Selection Guide ... 2 Overcurrent Protection (OCP) and Hiccup Mode ... 21 Absolute Maximum Ratings ... 3 BOOT Capacitor Protection .. 22 Thermal Characteristics .. 3 Asynchronous Diode Protection .. 22 Functional Block Diagram ... 4 Overvoltage Protection (OVP) ... 22 Pinout Diagram and Terminal List ... 5 SW Pin Protection ... 22 Electrical Characteristics ... 6 Pin-to-Ground and Pin-to-Short Protections .. 22 Typical Performance Characteristics ..11 Thermal Shutdown (TSD) ... 23 Functional Description .. 16 Application Information ... 25 Overview ... 16 Design and Component Selection ... 25 Reference Voltage .. 16 PWM Switching Frequency (RFSET) ... 25 Internal VREG Regulator ... 16 Output Voltage Setting ... 25 Oscillator/Switching Frequency ... 16 Output Inductor (LO) .. 26 Synchronization (SYNCIN) and Clock Output (CLKOUT) .. 16 Output Capacitors (CO) .. 27 Frequency Dither .. 16 Output Voltage Ripple – Ultralow-IQ LP Mode ... 28 Transconductance Error Amplifier ... 17 Input Capacitors .. 29 Compensation Components ... 18 Bootstrap Capacitor ... 29 Power MOSFETs .. 18 Soft Start and Hiccup Mode Timing (CSS) ... 29 BOOT Regulator ... 18 Compensation Components (RZ, CZ, and CP) ... 30 Soft Start (Startup) and Inrush Current Control ... 18 Power Stage ... 30 Slope Compensation ... 18 Error Amplifier ... 31 Pre-Biased Startup .. 19 A Generalized Tuning Procedure ... 32 Dropout ... 19 Power Dissipation and Thermal Calculations ... 34 PGOOD Output .. 19 EMI/EMC Aware PCB Design .. 36 Current Sense Amplifier ... 19 Typical Reference Designs .. 39 Pulse-Width Modulation (PWM) .. 19 Package Outline Drawing .. 41 2 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Package Typical Application Diagram Selection Guide Absolute Maximum Ratings Thermal Characteristics Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Typical Performance Characteristics Functional Description Overview Reference Voltage Internal VREG Regulator Oscillator/Switching Frequency Synchronization (SYNCIN) and Clock Output (CLOCKOUT) Frequency Dither Transconductance Error Amplifier Compensation Components Power MOSFETs BOOT Regulator Soft Start (Startup) and Inrush Current Control Slope Compensation Pre-Biased Startup Dropout PGOOD Output Current Sense Amplifier Pulse-Width Modulation (PWM) Low-Power (LP) Mode Protection Features Undervoltage Lockout (UVLO) Pulse-by-Pulse Peak Current Protection (PCP) Overcurrent Protection (OCP) and Hiccup Mode BOOT Capacitor Protection Asynchronous Diode Protection Overvoltage Protection (OVP) SW Pin Protection Pin-to-Ground and Pin-to-Short Protections Thermal Shutdown (TSD) Application Information Design and Component Selection PWM Switching Frequency (RFSET) Output Voltage Setting Output Inductor (LO) Output Capacitors (CO) Output Voltage Ripple – Ultralow-IQ LP Mode Input Capacitors Bootstrap Capacitor Soft Start and Hiccup Mode Timing (CSS) Compensation Components (RZ, CZ, and CP) Power Stage Error Amplifier A Generalized Tuning Procedure Power Dissipation and Thermal Calculations EMI/EMC Aware PCB Design Typical Reference Designs Package Outline Drawing