Datasheet NTD6600N (ON Semiconductor) - 5
| Fabricante | ON Semiconductor |
| Descripción | Power MOSFET100 V, 12 A, N−Channel, Logic Level DPAK |
| Páginas / Página | 7 / 5 — NTD6600N. TYPICAL CHARACTERISTICS. Figure 7. Capacitance Variation. … |
| Revisión | 4 |
| Formato / tamaño de archivo | PDF / 123 Kb |
| Idioma del documento | Inglés |
NTD6600N. TYPICAL CHARACTERISTICS. Figure 7. Capacitance Variation. Figure 8. Gate−to−Source and
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NTD6600N TYPICAL CHARACTERISTICS
1500 8 100 (V) T (V) J = 25°C Ciss V V 90 DS GS V 1250 DS = 0 V AGE AGE V 80 GS = 0 V T T 6 70 1000 VOL QT 60 ANCE (pF) Ciss 750 C 4 rss 50 ACIT Q1 40 500 C O−SOURCE Q O−SOURCE VOL oss 2 30 2 C, CAP TE−T 20 250 C ID = 12 A rss , GA T 10 J = 25°C , DRAIN−T GS 0 V 0 0 DS 10 5 0 5 10 15 20 25 V 0 2 4 6 8 10 12 14 16 18 VGS VDS Qg, TOTAL GATE CHARGE (nC) DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge
1000 12 VDS = 80 V VGS = 0 V ID = 6 A 10 TJ = 25°C VGS = 5 V 100 8 tr tf 6 td(off) t, TIME (ns) 10 td(on) 4 , SOURCE CURRENT (AMPS) 2 I S 1 0 1 10 100 0 0.25 0.5 0.75 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage versus versus Gate Resistance Current
1000 80 − V I GS = 20 V O 70 D = 12 A SINGLE PULSE 100 TC = 25°C 60 (AMPS) 50 10 ms 10 40 100 ms 30 ALANCE ENGERGY (mJ) 1 ms V A 1.0 10 ms 20 , DRAIN CURRENT R I D DS(on) LIMIT dc THERMAL LIMIT 10 PACKAGE LIMIT EAS, SINGLE PULSE DRAIN −T SOURCE 0.1 0 0.1 1.0 10 100 1000 25 50 75 100 125 150 175 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy Safe Operating Area versus Starting Junction Temperature http://onsemi.com 4
1500 8 100 (V) T (V) J = 25°C Ciss V V 90 DS GS V 1250 DS = 0 V AGE AGE V 80 GS = 0 V T T 6 70 1000 VOL QT 60 ANCE (pF) Ciss 750 C 4 rss 50 ACIT Q1 40 500 C O−SOURCE Q O−SOURCE VOL oss 2 30 2 C, CAP TE−T 20 250 C ID = 12 A rss , GA T 10 J = 25°C , DRAIN−T GS 0 V 0 0 DS 10 5 0 5 10 15 20 25 V 0 2 4 6 8 10 12 14 16 18 VGS VDS Qg, TOTAL GATE CHARGE (nC) DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge
1000 12 VDS = 80 V VGS = 0 V ID = 6 A 10 TJ = 25°C VGS = 5 V 100 8 tr tf 6 td(off) t, TIME (ns) 10 td(on) 4 , SOURCE CURRENT (AMPS) 2 I S 1 0 1 10 100 0 0.25 0.5 0.75 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage versus versus Gate Resistance Current
1000 80 − V I GS = 20 V O 70 D = 12 A SINGLE PULSE 100 TC = 25°C 60 (AMPS) 50 10 ms 10 40 100 ms 30 ALANCE ENGERGY (mJ) 1 ms V A 1.0 10 ms 20 , DRAIN CURRENT R I D DS(on) LIMIT dc THERMAL LIMIT 10 PACKAGE LIMIT EAS, SINGLE PULSE DRAIN −T SOURCE 0.1 0 0.1 1.0 10 100 1000 25 50 75 100 125 150 175 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy Safe Operating Area versus Starting Junction Temperature http://onsemi.com 4