Datasheet RA2L2 (Renesas) - 9
Fabricante | Renesas |
Descripción | Ultra low power 48 MHz Arm® Cortex®-M23 core, up to 128-KB code flash memory, 16-KB SRAM, USB 2.0 Full-Speed module (USBFS), USB Type-C® interface (USBCC), 12-bit A/D Converter, Security and Safety features. |
Páginas / Página | 108 / 9 — Table 1.12. Function Comparison. A2L209xCFM. A2L207xCFM. A2L209xCFL. … |
Formato / tamaño de archivo | PDF / 2.0 Mb |
Idioma del documento | Inglés |
Table 1.12. Function Comparison. A2L209xCFM. A2L207xCFM. A2L209xCFL. A2L209xCNE. A2L207xCFL. A2L207xCNE. A2L209xCFJ. A2L209xCNH. A2L207xCFJ

Línea de modelo para esta hoja de datos
Versión de texto del documento
RA2L2 Datasheet 1. Overview 1.4 Function Comparison
Table 1.12 Function Comparison A2L209xCFM A2L207xCFM A2L209xCFL A2L209xCNE A2L207xCFL A2L207xCNE A2L209xCFJ A2L209xCNH A2L207xCFJ A2L207xCNH Parts number R7F R7F R7F R7F R7F R7F R7F R7F R7F R7F
Pin count 64 48 32 Package LQFP LQFP/HWQFN LQFP/HWQFN Code flash memory 128 KB 64 KB 128 KB 64 KB 128 KB 64 KB Data flash memory 4 KB 4 KB 4 KB SRAM(Parity) 16 KB 16 KB 16 KB System CPU clock 48 MHz 48 MHz 48 MHz Sub clock oscillator Yes Yes Yes ICU Yes Yes Yes KINT 8 5 4 Event control ELC Yes Yes Yes DMA DTC Yes Yes Yes Timers GPT32 1 (PWM outputs: 2) 1 (PWM outputs: 2) 1 (PWM outputs: 2) GPT16 6 (PWM outputs: 12) 6 (PWM outputs: 12) 6 (PWM outputs: 7) AGTW 2 2 2 RTC Yes Yes Yes WDT/IWDT Yes Yes Yes Communication SCI 4 4 3 I3C 1 1 1 SPI 1 1 1 CAN 1 1 1 SSIE 1 1 1 UARTA 2 2 2 USBFS 1 1 1 USBCC 1 1 1 Analog ADC12 17 13 10 TSN Yes Yes Yes Data processing CRC Yes Yes Yes DOC Yes Yes Yes Security TRNG TRNG TRNG I/O ports I/O pins 51 35 21 Input pins 3 3 3 Pull-up resistors 51 35 21 N-ch open-drain 38 24 13 outputs 5-V tolerance 7 7 5 R01DS0445EJ0110 Rev.1.10 Page 9 of 108 Mar 12, 2025 Document Outline Features 1. Overview 1.1 Function Outline 1.2 Block Diagram 1.3 Part Numbering 1.4 Function Comparison 1.5 Pin Functions 1.6 Pin Assignments 1.7 Pin Lists 2. Electrical Characteristics 2.1 Absolute Maximum Ratings 2.2 DC Characteristics 2.2.1 Tj/Ta Definition 2.2.2 I/O VIH, VIL 2.2.3 I/O IOH, IOL 2.2.4 I/O VOH, VOL, and Other Characteristics 2.2.5 Operating and Standby Current 2.2.6 VCC Rise and Fall Gradient and Ripple Frequency 2.2.7 Thermal Characteristics 2.3 AC Characteristics 2.3.1 Frequency 2.3.2 Clock Timing 2.3.3 Reset Timing 2.3.4 Wakeup Time 2.3.5 NMI and IRQ Noise Filter 2.3.6 I/O Ports, POEG, GPT, AGTW, KINT, and ADC12 Trigger Timing 2.3.7 CAC Timing 2.3.8 SCI Timing 2.3.9 SPI Timing 2.3.10 I3C Timing 2.3.11 SSIE Timing 2.3.12 UARTA Timing 2.3.13 CLKOUT Timing 2.4 USB Characteristics 2.4.1 USBFS Timing 2.4.2 USBCC Characteristics 2.5 ADC12 Characteristics 2.6 TSN Characteristics 2.7 OSC Stop Detect Characteristics 2.8 POR and LVD Characteristics 2.9 Flash Memory Characteristics 2.9.1 Code Flash Memory Characteristics 2.9.2 Data Flash Memory Characteristics 2.10 Serial Wire Debug (SWD) Appendix 1. Port States in each Processing Mode Appendix 2. Package Dimensions Appendix 3. I/O Registers 3.1 Peripheral Base Addresses 3.2 Access Cycles Revision History General Precautions Notice