Datasheet CH9121 (Nanjing Qinheng Microelectronics)
| Fabricante | Nanjing Qinheng Microelectronics |
| Descripción | Network serial port transparent transmission chip |
| Páginas / Página | 15 / 1 — Network serial port transparent transmission chip CH9121. 1. Overview. 2. … |
| Revisión | V2.5 |
| Formato / tamaño de archivo | PDF / 283 Kb |
| Idioma del documento | Inglés |
Network serial port transparent transmission chip CH9121. 1. Overview. 2. Features
Línea de modelo para esta hoja de datos
Versión de texto del documento
CH9121 Datasheet https://wch-ic.com
Network serial port transparent transmission chip CH9121
Datasheet Version: V2.5 https://wch-ic.com
1. Overview
CH9121 is a network serial port transparent transmission chip with built-in 10/100M Ethernet media transmission layer (MAC) and physical layer (PHY), fully compatible with IEEE802.3 protocol. It integrates TCP/IP protocol stack internally, which can realize bidirectional transparent transmission of network data packets and serial port data. CH9121 has 4 working modes: TCP CLIENT, TCP SERVER, UDP CLIENT and UDP server, and the highest baud rate of serial port can support 10Mbps. Users can easily configure parameters through PC software or serial commands. Users are advised to use the upper computer software for configuration. If you need to use the serial command configuration, please refer to the document CH9121 Serial Control Command. PDF in CH9121EVT. The following figure shows the application block diagram of CH9121. Table 1-1 CH9121 application block diagram TXD=>RXD IP RXD<=TXD UART1 User ARP equipment, Serial port 1 UDP Computers, such as IGMP industrial MCUs, TXD=>RXD ICMP computers and embedded UART2 RXD<=TXD TCP other systems, Serial port 2 TXP equipment etc. TXN 10/100M MAC/PHY RXP RXN CH9121 ETH
2. Features
Built-in Ethernet media transmission layer MAC and physical layer transceiver PHY Support 10/100M, full-duplex/half-duplex adaptive, compatible with IEEE 802.3 protocol. Support automatic conversion of MDI/MDIX lines The I/O port supports 3.3V, 2.5V, and 1.8V power supply, and is compatible with microcontrollers of various voltage standards Built-in network port pull-up resistor, crystal oscillator matching capacitor, simplifying external circuit Built-in TCP/IP protocol cluster, supporting IPv4, ARP, ICMP, IGMP, UDP and TCP protocols. Support DHCP to automatically obtain IP address and DNS domain name access. Support TCP CLIENT, TCP SERVER and UDP CLIENT, UDP SERVER 4 working modes Support 2 independent serial ports and independent transparent transmission The serial port baud rate supports 300 bps to 10Mbps. V2.5 1 Document Outline 1. Overview 2. Features 3. Pinouts 4. Pin Definitions 5. Function Parameter Descriptions 5.1 Overview 5.2 Basic Parameters 5.3 Port Parameter 5.4 Default Configuration 6. Function Descriptions 6.1 UART 6.1.1 Serial Baud Rate 6.2 Other Hardware 7. Parameters 7.1 Absolute Maximum Value 7.2 Electrical Parameters 7.3 Power Consumption 7.4 AC Electrical Characteristics and Timing 8. Package Information 8.1 TSSOP20 8.2 LQFP64M 9. Applications 9.1 CH9121T Reference Circuit 9.2 CH9121A Reference Circuit
Network serial port transparent transmission chip CH9121
Datasheet Version: V2.5 https://wch-ic.com
1. Overview
CH9121 is a network serial port transparent transmission chip with built-in 10/100M Ethernet media transmission layer (MAC) and physical layer (PHY), fully compatible with IEEE802.3 protocol. It integrates TCP/IP protocol stack internally, which can realize bidirectional transparent transmission of network data packets and serial port data. CH9121 has 4 working modes: TCP CLIENT, TCP SERVER, UDP CLIENT and UDP server, and the highest baud rate of serial port can support 10Mbps. Users can easily configure parameters through PC software or serial commands. Users are advised to use the upper computer software for configuration. If you need to use the serial command configuration, please refer to the document CH9121 Serial Control Command. PDF in CH9121EVT. The following figure shows the application block diagram of CH9121. Table 1-1 CH9121 application block diagram TXD=>RXD IP RXD<=TXD UART1 User ARP equipment, Serial port 1 UDP Computers, such as IGMP industrial MCUs, TXD=>RXD ICMP computers and embedded UART2 RXD<=TXD TCP other systems, Serial port 2 TXP equipment etc. TXN 10/100M MAC/PHY RXP RXN CH9121 ETH
2. Features
Built-in Ethernet media transmission layer MAC and physical layer transceiver PHY Support 10/100M, full-duplex/half-duplex adaptive, compatible with IEEE 802.3 protocol. Support automatic conversion of MDI/MDIX lines The I/O port supports 3.3V, 2.5V, and 1.8V power supply, and is compatible with microcontrollers of various voltage standards Built-in network port pull-up resistor, crystal oscillator matching capacitor, simplifying external circuit Built-in TCP/IP protocol cluster, supporting IPv4, ARP, ICMP, IGMP, UDP and TCP protocols. Support DHCP to automatically obtain IP address and DNS domain name access. Support TCP CLIENT, TCP SERVER and UDP CLIENT, UDP SERVER 4 working modes Support 2 independent serial ports and independent transparent transmission The serial port baud rate supports 300 bps to 10Mbps. V2.5 1 Document Outline 1. Overview 2. Features 3. Pinouts 4. Pin Definitions 5. Function Parameter Descriptions 5.1 Overview 5.2 Basic Parameters 5.3 Port Parameter 5.4 Default Configuration 6. Function Descriptions 6.1 UART 6.1.1 Serial Baud Rate 6.2 Other Hardware 7. Parameters 7.1 Absolute Maximum Value 7.2 Electrical Parameters 7.3 Power Consumption 7.4 AC Electrical Characteristics and Timing 8. Package Information 8.1 TSSOP20 8.2 LQFP64M 9. Applications 9.1 CH9121T Reference Circuit 9.2 CH9121A Reference Circuit