Datasheet CH9121 (Nanjing Qinheng Microelectronics) - 9

FabricanteNanjing Qinheng Microelectronics
DescripciónNetwork serial port transparent transmission chip
Páginas / Página15 / 9 — 6.2 Other Hardware
RevisiónV2.5
Formato / tamaño de archivoPDF / 283 Kb
Idioma del documentoInglés

6.2 Other Hardware

6.2 Other Hardware

Línea de modelo para esta hoja de datos

Versión de texto del documento

CH9121 Datasheet https://wch-ic.com
6.2 Other Hardware
CH9121 chip integrates 10M/100M Ethernet PHY, MAC, UART, SRAM, high-speed MCU, PLL frequency multiplier, power-on reset circuit, etc. CH9121 chip has built-in power-on reset circuit, which can also be controlled by pulling RSTI pin low. RSTI pin of CH9121A is used to input asynchronous reset signal from outside; When the RSTI pin is low, the CH9121A chip is reset; When the RSTIA pin returns to the high level, CH9121A will enter the initialization phase for about 15ms, during which the host prohibits the operation of CH9121A. V2.5 9 Document Outline 1. Overview 2. Features 3. Pinouts 4. Pin Definitions 5. Function Parameter Descriptions 5.1 Overview 5.2 Basic Parameters 5.3 Port Parameter 5.4 Default Configuration 6. Function Descriptions 6.1 UART 6.1.1 Serial Baud Rate 6.2 Other Hardware 7. Parameters 7.1 Absolute Maximum Value 7.2 Electrical Parameters 7.3 Power Consumption 7.4 AC Electrical Characteristics and Timing 8. Package Information 8.1 TSSOP20 8.2 LQFP64M 9. Applications 9.1 CH9121T Reference Circuit 9.2 CH9121A Reference Circuit