Datasheet MAX6951 (Analog Devices) - 9

Serially Interfaced, +2.7V to +5.5V, 5- and 8-Digit LED Display Drivers MAX6950/MAX6951 Table 4. Initial Power-Up Register Status REGISTER DATA REGISTER POWER-UP CONDITION ADDRESS CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Decode No decode for digits 7–0 0x01 0 0 0 0 0 0 0 0 Intensity 1/16 (min on) 0x02 X X X X 0 0 0 0 Scan Limit Display 5 digits: 0 1 2 3 4 0x03 X X X X X 1 0 0 S hutd ow n enab l ed /b l i nk Configuration 0x04 X X X 0 0 0 0 0 sp eed i s sl ow /b l i nk d i sab l ed Display Test Normal operation 0x07 X X X X X X X 0 Digit 0 Blank digit, both planes 0x60 0 0 0 0 0 0 0 0 Digit 1 Blank digit, both planes 0x61 0 0 0 0 0 0 0 0 Digit 2 Blank digit, both planes 0x62 0 0 0 0 0 0 0 0 Digit 3 Blank digit, both planes 0x63 0 0 0 0 0 0 0 0 Digit 4 Blank digit, both planes 0x64 0 0 0 0 0 0 0 0 Digit 5 Blank digit, both planes 0x65 0 0 0 0 0 0 0 0 Digit 6 Blank digit, both planes 0x66 0 0 0 0 0 0 0 0 Digit 7 Blank digit, both planes 0x67 0 0 0 0 0 0 0 0
Scan-Limit Register Decode Mode Register
The scan-limit register sets how many digits are dis- The decode mode register sets hexadecimal code played, from one to eight digits. It is possible to set the (0–9, A–F) or no-decode operation for each digit. Each MAX6950 (the five-digit part) to scan six, seven, or bit in the register corresponds to one digit. A logic high eight digits. The MAX6951 set to eight digits displays selects hexadecimal code font decoding for that digit, five digits less brightly than if it had been set to scan while logic low bypasses the decoder. Digits may be five digits, but the brightness would match that of a set for decode or no-decode in any combination. MAX6951 used in the same system if the Intensity reg- Examples of the decode mode control register format isters are set to the same value. For example, consider are shown in Table 14. an 11-digit requirement. This can be served by using a When the hexadecimal code-decode mode is used, the MAX6950 to drive five digits plus a MAX6951 to drive decoder looks only at the lower nibble of the data in the six digits. Both parts are configured to drive six digits to digit register (D3–D0), disregarding bits D6–D4. D7, ensure the brightness is the same. which sets the decimal point (SEG DP), is independent The digits are displayed in a multiplexed manner with a of the decoder, and is positive logic (D7 = 1 turns the typical display scan rate of 1kHz with five digits dis- decimal point on). Table 15 lists the hexadecimal code played or 625Hz with eight digits displayed with fOSC = font. When no-decode is selected, data bits D7–D0 cor- 4MHz. Since the number of scanned digits affects the respond to the segment lines of the MAX6950/ display brightness, the Scan-Limit register should not MAX6951. Table 15 shows the one-to-one pairing of be used to blank portions of the display (such as for each data bit to the appropriate segment line. leading-zero suppression). Table 12 lists the scan-limit register format.
Display Digit Registers
The MAX6950/MAX6951 use a digit register to store the
Intensity Register
data that the user wishes to display on the LED digits. Digital control of display brightness is provided by an These digit registers are implemented by two planes of internal pulse-width modulator, which is controlled by the 8-byte, dual-port SRAM, called P0 and P1. The digit lower nibble of the intensity register (Figure 4). The mod- registers are dual port to enable them to be written to ulator scales the average segment current in 16 steps through the SPI interface, asynchronous to being read from a minimum of 15/16 down to 1/16 of the peak cur- to multiplex the display. rent. The minimum interdigit blanking time is set to 1/16 of a cycle. See Table 13 for Intensity register format.
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